Power is considered as the most important constraint in embedded systems
Low power design is essential in High-performance systems because excessive power dissipation reduces reliability and increases the cost imposed by cooling systems and packaging and portable systems because battery technology cannot keep the pace with large demands for devices with light batteries and long time between recharges.
The growing market of portables such as cellular phones, gaming consoles and battery-powered electronic systems demands microelectronic circuits design with ultra low power dissipation.
As the integration, size, and complexity of the chips continue to increase, the difficulty in providing adequate cooling might either add significant cost or limit the functionality of the computing systems which make use of those integrated circuits.
As the technology node scales down to 65nm, there is not much increase in dynamic power dissipation. However the static or leakage power reaches or exceeds the dynamic power levels beyond 65nm technology node.
Hence the techniques to reduce power dissipation is not limited to dynamic power.
Total Power dissipated in a CMOS circuit is sum of dynamic power, short circuit power and static or leakage power.
Power dissipation was neglected due to low device density and low operating frequency
Now it is important issue due to High device density, High operating frequency, Proliferation of portable consumer electronics and Concerns on Environments and energy sources.