Ask
Login
0
1.9kviews
Explain CS with current load
written 7.6 years ago by gravatar for teamques10 teamques10 ★ 70k modified 3.0 years ago by gravatar for sagarkolekar sagarkolekar ★ 11k
cmos vlsi design
ADD COMMENT EDIT
1 Answer
0
7views
written 7.6 years ago by gravatar for teamques10 teamques10 ★ 70k •   modified 7.6 years ago

CS stage with current load.

  • $A_v$ of single CS amp is $A_v=-gmR_D$. So to increase $A_v$, we need to increase $R_D$. With a resistor or diode connected load, increasing $R_L$ limits output voltage swing more practical approach is to replace limit output.

    enter image description here

  • Here MOS $M_2$ will be acting as a …

Create a free account to keep reading this post.

and 5 others joined a min ago.

ADD COMMENT EDIT
Please log in to add an answer.