Draw & explain floor plan for a possible mixed signal chip.

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written 7.6 years ago by

teamques10 ★ 70k

• modified 3.9 years ago

Subject: CMOS VLSI Design

Topic: Analog Layout and other concepts

Difficulty: High

cmos vlsi design

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written 7.6 years ago by

teamques10 ★ 70k

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Above figure shows floor plan of a power technology that contains power devices as well as digital and analog circuitry.
It highlights the spatial separation of the power, digital and analog domains.
Floor plan also shows the placement of ESD power clamps, power rails and peripheral I/O.

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