**Qualitative analysis of basic differential pair:**

- Assume $V_{in_{1}}-V_{in_{2}}$ varies from $-\infty \,\, to + \infty$

**Fig:Diffrential mode characteristics(DM behaviour)**

$V_{in}$ is more -ve than $V_{in_{2}},\,M_1$ - OFF & $M_2$- ON & $I_{D_{2}}=I_{SS}$

$\therefore\,\,V_{out_{2}}=V_{DD}-R_D\,I_{SS}$

$\therefore\,\,V_{out_{1}}=V_{DD} $As $V_{in}$ increases, $M_1$ is gradually turned ON, drawing a fraction of current from $I_{SS}$ & hence $V_{out_{1}}$ decreases and $I_{D_{2}}$ decreases and $V_{D_{2}}$ increases.

$V_{in_{1}}=V_{in_{2}}, V_{out_{1}}=V_{out_{2}}=V_{DD}-R_D\,I_{SS}/2$

$V_{in_{2}}$ is more positive than $V_{in_{2}}$, $M_1$ carries more current.

$\therefore\,\, V_{out_{1}}$ drops below $V_{out_{2}}$.

$\therefore\,\, V_{out_{1}}=V_{DD}-I_D\,R_D=V_{DD}-I_{SS}\,R_D$

$\therefore\,\, V_{out_{2}}=V_{DD}$

**Two important attributes:**

(a) minimum & maximum levels at the output are well defined ($V_{DD}\,\,and \,\,V_{DD}-I_{SS}\,R_D$).

(b) $V_{out_{1}}-V_{out_{2}}$ is independent of input common mode level.

**Common Mode Characteristics: CM behaviour**

$I_{SS}$ implemented by an NMOS.

If $V_{in,cm}=0,\,\,M_1\,\,and\,\,M_2$ -> OFF , yeilding $I_{DS}$ =0

with $I_{D_{1}}=I_{D_{2}}=0$, the circuit is incapable of signal amplification

$\therefore\,\,V_{out_{1}}=V_{out_{2}}=V_{DD}$.If $V_{in,cm}$ becomes positive, $M_1$ and $M_2$ - ON,

if $V_{in,cm} \geq V_{Th}, \,\,I_{D_{1}}$ and $I_{D_{2}}$ continues to increases .

$\therefore \,\, I_{D_{1}}$ and $I_{D_{2}}$ increases -> $V_{out_{1}}$ and $V_{out_{2}}$ decreases.For sufficiently high $V_{in,cm}$ the $V_{DS_{3}}$ exceeds $V_{GS_{3}}-V_{Th_{3}}$, allowing $M_3$ to operate in saturation.

$\therefore$ Total current through $M_1$ and $M_2$ will remain constant. So beyond this, even if $V_{in,cm}$ increases, $V_{out_{1}}$ and $V_{out_{2}}$ will remain constant i.e$V_{out_{1}}=V_{out_{2}}=V_{DD}-\frac{I_{SS}}{2}R_D$