Trench Isolation

1. Shallow trench isolation –

Shallow trench isolation (STI), also known as box isolation technique, is an integrated circuit feature which prevents electric current leakage between adjacent semiconductor device components.

STI is generally used on CMOS process technology nodes of 250 nanometers and smaller. Older

CMOS technologies and non-MOS technologies commonly use isolation based on LOCOS.

The Shallow Trench Isolation (STI) is the preferred isolation technique for the sub-0.5 μm technology, because it completely avoids the bird's beak shape characteristic.

With its zero oxide field encroachment STI is more suitable for the increased density requirements, because it allows forming of smaller isolation regions.

The STI process starts in the same way as the LOCOS process. The first difference compared to

LOCOS is that a shallow trench is etched into the silicon substrate, as shown in Figure.(a)

After underetching of the oxide pad, also a thermal oxide in the trench is grown, the so-called liner oxide (Figure c).

But unlike with LOCOS, the thermal oxidation process is stopped after the formation of a thin oxide layer, and the rest of the trench is filled with a deposited oxide (Figure d).

Next, the excessive (deposited) oxide is removed with chemical mechanical planarization. At last the nitride mask is also removed. The price for saving space with STI is the larger number of different process steps.

2. Deep trench isolation –

It uses the trenches of fixed width, typically 0.18 to 1 μm in width and 2 to 5 m in width and 2 to 5 μm in depth. Smaller trench widths are particularly attractive for memory application.

It finds application in CMOS image sensors (used in camera).

The process is fabricated by starting from a standard LOCOS structure.

After nitride patterning, the trenches are etched. Trench is typically done by simultaneously depositing $SiO_2$ while etching silicon anisotropically.

This creates small cusp of $SiO_2$ at the top of the trench. The thickness of this cusp increases with time and create desired taper.

The walls cannot undercut the mask and must result in rounded bottom.

Then a field implant is done. The implant is followed by a thin local oxidation.

Finally a layer of polysilicon is deposited and etched back. If polysilicon is thick enough it will fill the groove. Second thermal oxidation can be used to complete the process by oxidizing the upper part of polysilicon in groove.