DC design

i)Selection of operating point Q

The operating point will be selected approximately at the center of dc load line to get output signal without distortion

$V_{CEQ}\frac{V_{CC}}{2}$=\frac{12}{2}=6 V .......(i)

and $I_{CEQ}\ge I_L{P}=\frac{V_{OP}}{R_{L}}=\frac{3}{5K}$=0.6mA

Hence select $I_{CQ}$=1mA .......(ii)

Therefore operating point Q(6V,1mA)

ii)Selection of transistor

Power dissipation =$6\times1$mA=6mW

Select the transistor …