Write short notes on: NOR based ROM array

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written 6.9 years ago by

hetalgosavi • 1.7k

• modified 6.7 years ago

Subject: Basic VLSI Design

Topic: Semiconductor Memories

Difficulty: Medium

vlsi design

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written 6.7 years ago by

hetalgosavi • 1.7k

Consider the first 4-bit X 4bit memory array as shown in Figure below. Here, each column consists of a pseudo nMOS NOR gate driven by some of the row signals, i.e., the word line.
Only one word line is activated at a time by raising its voltage to VDD, while …

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