Question: Explain the register structure of 8086 processor.
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Mumbai University > Electronics and Telecommunication > Sem 4 > Microprocessor and peripherals

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modified 8 months ago by gravatar for Ankit Pandey Ankit Pandey100 written 11 months ago by gravatar for kazi.tahoor kazi.tahoor0
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GENERAL PURPOSE REGISTERS

8086 CPU has 8 general purpose registers, each register has its own name:

AX - the accumulator register (divided into AH / AL):

  • Generates shortest machine code
  • Arithmetic, logic and data transfer
  • One number must be in AL or AX
  • Multiplication & Division
  • Input & Output

BX - the base address register (divided into BH / BL).

CX - the count register (divided into CH / CL):

  • Iterative code segments using the LOOP instruction
  • Repetitive operations on strings with the REP command
  • Count (in CL) of bits to shift and rotate

DX - the data register (divided into DH / DL):

  • DX:AX concatenated into 32-bit register for some MUL and DIV operations
  • Specifying ports in some IN and OUT operations

SI - source index register:

  • Can be used for pointer addressing of data
  • Used as source in some string processing instructions
  • Offset address relative to DS

DI - destination index register:

  • Can be used for pointer addressing of data
  • Used as destination in some string processing instructions
  • Offset address relative to ES

BP - base pointer:

  • Primarily used to access parameters passed via the stack
  • Offset address relative to SS

SP - stack pointer:

  • Always points to top item on the stack
  • Offset address relative to SS
  • Always points to word (byte at even address)
  • An empty stack will had SP = FFFEh

SEGMENT REGISTERS

CS - points at the segment containing the current program.

DS - generally points at segment where variables are defined.

ES - extra segment register, it's up to a coder to define its usage.

SS - points at the segment containing the stack.

SPECIAL PURPOSE REGISTERS

IP - the instruction pointer:

  • Always points to next instruction to be executed
  • Offset address relative to CS

IP register always works together with CS segment register and it points to currently executing instruction.

FLAGS REGISTER

  • Flags Register - determines the current state of the processor.

Flags Register is modified automatically by CPU after mathematical operations, this allows to determine the type of the result, and to determine conditions to transfer control to other parts of the program. Generally you cannot access these registers directly.

Carry Flag (CF) - this flag is set to 1 when there is an unsigned overflow. For example when you add bytes 255 + 1 (result is not in range 0...255). When there is no overflow this flag is set to 0.

Parity Flag (PF) - this flag is set to 1 when there is even number of one bits in result, and to 0 when there is odd number of one bits. Even if result is a word only 8 low bits are analyzed

Auxiliary Flag (AF) - set to 1 when there is an unsigned overflow for low nibble (4 bits).

Zero Flag (ZF) - set to 1 when result is zero. For none zero result this flag is set to 0.

Sign Flag (SF) - set to 1 when result is negative. When result is positive it is set to 0. Actually this flag take the value of the most significant bit.

Trap Flag (TF) - Used for on-chip debugging.

Interrupt enable Flag (IF) - when this flag is set to 1 CPU reacts to interrupts from external devices.

Direction Flag (DF) - this flag is used by some instructions to process data chains, when this flag is set to 0 - the processing is done forward, when this flag is set to 1 the processing is done backward.

Overflow Flag (OF) - set to 1 when there is a signed overflow. For example, when you add bytes 100 + 50 (result is not in range -128...127).

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written 8 months ago by gravatar for Ankit Pandey Ankit Pandey100
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