Explain common mode response of differential pair with necessary derivations.

Subject: CMOS VLSI Design

Topic: Differential Amplifiers

Difficulty: Medium

cvd • 505  views

Common Mode Characteristics

(a) Circuit is symmetric but tail current source with finite resistance:

i) As $V_{in,cm}$ increases, $V_D$ increases, thereby increases drain current of $M_1\,\,and \,\,M_2$ and decreases both $V_x,\,\,V_y$.
ii) Due to symmetry, $V_x=V_y$, so they can be shorted together.

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iii) Now, $M_1\,,\,M_2$ are parallel. Therefore, circuit can be simplified as per fig (c)

iv) $-(M_1+M_2)$ has twice the width (i.e twice bias current). Therefore twice the transconductance ($g_m$).
$\therefore \,\,$ CM gain of the circuit will be,



Note: In a symmetric circuit, CM variation disturb the bias points, altering the small-signal gain and limiting the output voltage swings.

(b) Effect of mismatches in $R_D$:

i) let, $R_{D1}=R_D$ and $R_{D2}=R_D+ \Delta R_D$ small mismatch and circuit is symmetrical otherwise
ii) assume $M_1\,\,,\,M_2$ identical.
iii) As, $V_{in,cm} increases, I_{D1} \,\,and\,\,I_{D2}$ increases by $\Big[ \frac{g_m}{1+2\,g_m\,R_{SS}} \Big] \Delta\,V_{in,cm} $

enter image description here

iv) But, $V_x$ and $V_y$ change by different amount.
$\Delta V_x=-\Delta\,V_{in,cm}\,\frac{g_m}{1+2\,g_m\,R_{SS}}(R_D)$
$\Delta V_y=-\Delta\,V_{in,cm}\,\frac{g_m}{1+2\,g_m\,R_{SS}}(R_D+\Delta\,R_D)$

$\Big[ I_D=\frac{1}{\frac{1}{g_m}+2R_{SS}}V_{in}=\frac{g_m}{1+2\,g_m\,R_{SS}}V_{in} \Big]$

$\therefore$ Change in differential output voltage can be calculated by subtracting $\Delta V_y$ from $\Delta V_x$.

(c) Mismatch in transistor $M_1$ and $M_2$.


enter image description here

$\hspace{0.3cm}=-g_{m_{1}}(V_{in,cm}-V_P)R_D \hspace{2cm}$....(1)

$\hspace{0.3cm}=-g_{m_{2}}(V_{in,cm}-V_P)R_D \hspace{2cm}$....(2)



Substituting (3) in (1) and (2), we get,




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