Due to the situation of increasing technology adoption and deployment of new applications, embedded system designers face several problems in terms of flexibility while developing embedded systems such as:
- Difficulty in adapting to new environments Frequent changes in hardware and software facilities
- Issues in packaging and integration of small size chip with low weight and lesser power consumption
- Cost Reduction
Another increasingly aggravating limitation while designing of Embedded system is power dissipation of hardware design for getting the best performance out of real-time applications and devices. The persistent challenge is how to deploy an embedded system with an increasing number of transistors and with an acceptable power consumption ratio. There are two causes of high power dissipation in designing low-power embedded systems:
a. First, because the power dissipation per transistor is increasing with the increase in gate density, the power density of system on chips is set to increase. Thus, the engineers must reduce overall embedded systems’ power consumption by using efficient system architecture design rather than relying on process technology alone.
b. Second, engineers focus on better performance with low power consumption by increasing the frequency of the system, which burns more power.