Page: Explain SRAM design layout
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To determine the (W/L) ratios of the transistors in a typical CMOS SRAM cell as shown in Fig, a number of design criteria must be taken into consideration. The two basic requirements which dictate the (W/L) ratios are: (a) the data-read operation should not destroy the stored information in the SRAM cell, and (b) the cell should allow modification of the stored information during the data-write phase.

Layout of Resistive Load SRAM Cell

Layout of CMOS SRAM Cell

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written 10 weeks ago by gravatar for Vedant Chikhale Vedant Chikhale0
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