Q. Consider CMOS Inverter, $V_{DD} = 3.3V, V_{TOD} = 0.6 V, V_{TOP} = -0.7 V, K_n = 200 \mu A/V^2, K_p = 80 /mu A/V^2$. Claculate NM of ckt

Sol. Here $K_n != K+P$ => It is asymmetric

$V_{TOD} != V_{TOP}$

$K_R = \frac{K_n}{K_P} = 2.5$

1) $V_{OH} = V_{DD} = 3.3 V$

2) $V_{OL} = 0V$

3) $V_{IL} = \frac{2V_{out} + V_{TOP} - V_{DD} + K_R V_{TOD} V_{OL}}{1 + K_R}$

$V_{IL} = 0.5*V_{out} - 0.71$

When $V_{in} = V_{iL}$

nMOS -> sat & pMOS -> linear

But $V_{in} = V_{IL}$

$V_{IL} = 0.5V_{out} - 0.71$

=> $V_{IL} = 1.08 V$

4) $V_{IH} = \frac{V_{DD} + V_{TOP} + K_R(2V_{out} + V_{TOD})}{1 + K_R}$

When $V_{in} = V_{IH}$

pMOS - sat nMOS - linear

$\frac{K_n}{2}(2(V_{GSn} - V_{TOD})^2V_{DSn} - V_{DSn}^2) = \frac{K_P}{2}(V_{GSP} - V_{TOP})^2$

=> $V_{IH} = 1.55V$

5) Noise Margin

High Noise margin = $NM_H = V_{OH} - V_{IH} = 1.75 V$

Low Noise margin = $NM_L = V_{IL} - V_{OL} = 1.08 V$