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Explain the page address translation in case of virtual memory and explain TLB
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Virtual Memory:-

1) Virtual Memory was introduced in the system in order to increase the size the size of memory.

2) A hardware unit called Memory Management Unit (MMU) translates Virtual addresses into physical addresses.

3) If CPU wants data from main memory and it is not present in main memory then MMU causes operating system to bring the data into the Memory from disk.

4) As the disk limit is beyond the main memory address, the desired data address has to be translated from Virtual to physical address. MMU does the address translation.

5) Figure below shows Virtual Memory Organization:-

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Fig : Virtual Memory Organization

Paging:

1) Virtual Memory space is divided into equal size pages.

2) Main Memory space is divided into equal size page frames each frame can hold any page from Virtual Memory.

3) When CPU wants to access page, it first looks into main memory. If it is found in main memory then it is called Hit and page is transfer from main memory to CPU.

4) If CPU needs page that is not present in main memory then it is called as page fault. The page has to be loaded from Virtual Memory to main memory.

5) There are different page replacement schemes such as FIFO, LRU, LFU, Random Etc.

6) During page replacement, it the old page has been modified in the main memory, then it needs to be first copied into the Virtual Memory and then replaced. CPU keeps track of such updated pages by maintaining Dirty bit for each page. When page is updated in main memory dirty bit is set then this dirty page first copied into Virtual Memory & then replaced.

7) Pages are loaded into main memory only when required by the CPU, then it is called demand paging. Thus pages are loaded only after page faults.

8) Translation Look-Aside Buffer (TLB) :-

This is a on chip buffer within the CPU, used to speed up the paging process. Since a page from Virtual Memory can get stored into any frame of main memory, the OS maintains a page Table which indicates which page of virtual memory is stored in each page frame of main memory.

Hence for accessing the page CPU has to perform 2 Memory Operations:-

First access the page table to get information about where the page is stored in main memory, than access the main memory for the page. To solve this problems CPU copies the pages table information of the most recently used pages in the on-chip TLB. Therefore, subsequent access to the pages will be faster and information will be provided by the TBL and CPU need not Access the Table.

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