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Explain Dual Slope Integration type ADC with the help of a block a diagram, and comment on its speed.
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The dual-slope integration type of A/D conversion is a very popular method for digital voltmeter applications. When compared to other types of ADC techniques, the dual-slope method is slow but is quite adequate for a digital voltmeter used for laboratory measurements. When a dual-slope A/D converter is used for a DVM, the counters may be decade rather than binary and the segment and digit drivers may be contained in the chip. When the converter is to be interfaced to a microprocessor, and many high performance DVMs use microprocessors for data manipulation, the counters employed are binary.

Working -

In the dual-slope technique, an integrator is used to integrate an accurate voltage reference for a fixed period of time. The same integrator is then used to integrate with the reverse slope, the input voltage, and the time required to return to the starting voltage is measured. The order of integrations does not matter. Consider the integration circuit shown in the figure.

Where ‘t’ is the elapsed time from when the integration began. The above Equation also assumes that the integrator capacitor started with no charge & thus the output of the integrator started at zero volts. If the integration were allowed to continue for a fixed period of time $t_1$, the output voltage would be

$V_{out}=\frac{V_xt}{RC}$     $V_1=\frac{V_x}{RC}T_1$

Notice that the integrator output has gone in the opposite polarity as the input. That is, a positive input voltage produces a negative integrator output. If a reference voltage $V_{ref}$ were substituted for the input voltage $V_x$, as shown in the figure below, the integrator would begin to ramp toward zero at a rate of $\frac{V_{ref}}{RC}$assuming that the $V_{ref}$ was of the opposite polarity as the unknown input voltage. The integrator for this situation does not start at zero but at an output voltage of $V_1$, and the output voltage $V_{out}$ is

$V_{out}=V_1+\frac{V_{Ref}}{RC}t$

As the integrator responds to the average of the input, it is not necessary to provide a sample and hold, as changes in the input voltage will not cause significant errors. Although the integrator output will not be a linear ramp, the integration will represent the end value obtained by a voltage equal to the average of the unknown input voltage. Therefore, the dual-slope analog-to-digital conversion will produce a value equal to the average of the unknown input. In the days when analog integrated circuits were cheaper and more familiar to designers than digital circuits, the dual slope ADC was the choice for inexpensive multimeters, anything that didn't require high speed, and especially any problem that looked at noisy signals. Now that microcontrollers with high speed ADCs and facile signal averaging are available, the dual slope system is becoming less common. Nevertheless, when considering measurement of noisy signals, as long as conversion rates of no more than 10 times per second are adequate, this is an approach that is well worth considering. To conclude, dual slop integration type ADCs do not offer high speed conversion, but are highly reliable and effective when used with applications that tend to give out noisy signals.

One significant enhancement made to the dual-slope converter is automatic zero correction. As with any analog system, amplifier offset voltages, offset currents, and bias currents can cause errors. In addition, in the dual-slope A/D converter, the leakage current of the capacitor can cause errors in the integration and consequentially, an error. These effects, in the dual-slope AID converter, will manifest themselves as a reading of the DVM when no input voltage is present.

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