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Digital Circuit Design Question Paper - Dec 18 - Electronics Engineering (Semester 3) - Mumbai University (MU)
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written 6.5 years ago by
faizanshaikh
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Digital Circuit Design - Dec 18
Electronics Engineering (Semester 3)
Total marks: 80
Total time: 3 Hours
INSTRUCTIONS
(1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Draw neat diagrams wherever necessary.
1.a.
Design and implement full subtractor using logic gates.
(5 marks)
00
1.b. …
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