1.a Explain Static RAM.

1.b. Compare Moore and Mealy machines.

1.c. Which of the following expressions is equivalent to $Z=\overline{\overline{A(\overline{A B )}} \cdot \overline{B(\overline{A B})}} ?$

i) $Z=A \oplus B$

ii) $Z=\overline{A \oplus B}$

iii) Z=A+B

iv) Z = A.B (1 mark)

Prove it.(4 marks)

1.d. Perform the following operation using 2's compliment

i. (46)₁₀−(23)₁₀(2 marks)

ii. (23)₁₀−(46)₁₀(2 marks)

Comment on the results of (i) and (ii).(1 mark)

2.a. Compare combinational circuits with Sequential circuits.

2.b. Convert the following into BCD and Octal code

i. (AB)₁₆   ii. (118)₁₀

2.c. Draw and explain a neat circuit diagram of BCD adder using IC 7483.

3.a. Minimize the following expression using Quine McClusky Technique

F(A,B,C,D) = Σm(1,3,7,11,15) + d(0,2,5)

3.b. Implement the following function using single 8:1 Multiplexer.

f(A,B,C,D) = Σm(2,3,5,7,8,9,12,13,14,15)

4.a. What is excitation table? Explain the excitation table of SR Flip Flop.

4.b. Convert SR flip flop into JK flip flop

4.c. What is shift register? Explain working of Serial In Serial Out. Give its applications.

5.a. Simplify the following expression using Boolean algebra:

Y(A,B,C) = Σm(0,1,2,3,4,5,6,7)

5.b. Represent the following Boolean expression by min/max terms:

Y(A,B,C,D) = (A+B+C̅)(A̅+C+D̅)

5.c. Design synchronous counter using D-type flip-flops for getting the following sequence: 0 - 2 - 4 - 6 - 0. Take care of lockout condition.

6.a. Write VHDL code for 3:8 Decoder.

6.b. Compare FPGA and CPLD.

6.c. Design Full Adder circuit using PLA.