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Digital Logic Design And Analysis Question Paper - Dec 17 - Computer Engineering (Semester 3) - Mumbai University (MU)
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Digital Logic Design And Analysis - Dec 17

Computer Engineering (Semester 3)

Total marks: 80
Total time: 3 Hours
INSTRUCTIONS
(1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Draw neat diagrams wherever necessary.

1.a. Convert $(1762.46)_{10}$ into octal, binary and hexadecimal.
(3 marks) 00

1.b. Prove OR-AND configuration is equivalent to NOR-NOR configuration.
(3 marks) 00

1.c. perform subtraction using 16's complement.

  1. $(CB1)_{16}$ - $(971)_{16}$

  2. $(426)_{16}$ - $(DBA)_{16}$

(4 marks) 00

1.d. Find 8's complement of following numbers.

  1. $(27)_{8}$

  2. $(321)_{8}$

(2 marks) 00

1.e. Perform the following subtraction $(52)_{10}$ - $(65)_{10}$ using 2's complement method.

(2 marks) 00

1.f. Write the hamming code for 1010.
(2 marks) 00

1.g. Implement the following Boolean equation using NAND gates only.

Y = AB +CDE + F

(2 marks) 00

1.h. Explain the term prime implicant.
(2 marks) 00

2.a. Design a 4-bit ripple adder.
(10 marks) 00

2.b. Obtain the minimal expression using Quine Mc-Cluskey method. $ F(A,B,C,D) = \Large \Sigma m (1,5,6,12,13,14) +d(2,4)$
(10 marks) 00

3.a. Implement a full adder using 8:1 multiplexer.
(10 marks) 00

3.b. Implement the following functions using demultiplexer. $F1(A,B,C,) = \Large \Sigma m (0,3,7,) F2(A,B,C) = \Large \Sigma m (1,2,5)$
(5 marks) 00

3.c. Simplify $F(A,B,C,D) = \Large \Pi M(3,4,5,6,7,10,11,15)$ and implement using minimum number of gates.
(5 marks) 00

4.a. Compare TTL and CMOS logic with respect to fan in, fan out, propagation delay, power consumption, noise margin, current and voltage parameters.
(5 marks) 00

4.b. Draw the circuit for SR flip-flop using two NOR gates and write the architecture body for the same using structural modelling.
(5 marks) 00

4.c. Explain 1-digit BCD adder.
(10 marks) 00

5.a. Convert JK flip-flop to SR flip-flop and D flip-flop.
(10 marks) 00

5.b. Design 3 bit synchronous counter using T flip-flop.
(10 marks) 00

Write short note on (Any FOUR)

6.a. State table
(5 marks) 00

6.b. ALU IC 74181
(5 marks) 00

6.c. Sequence Generator
(5 marks) 00

6.d. Data flow modelling
(5 marks) 00

6.e. 4-bit ring counter
(5 marks) 00

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