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Digital Electronics Question Paper - Jun 18 - Electronics And Telecomm (Semester 3) - Pune University (PU)
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Digital Electronics - Jun 18
Electronics And Telecomm (Semester 3)
Total marks: 80
Total time: 3 Hours
INSTRUCTIONS
(1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Draw neat diagrams wherever necessary.
1.a.
Design a full adder using two half adders.
(4 marks)
00
1.b.
Minimize the following expressions using K-map and implement using logic gates.
(4 marks)
00
$Y = \Sigma m(4,5,6,7,12,13,14,15)$
1.c.
State the types of shift register and explain any one of them.
(4 marks)
00
OR
2.a.
Design 3 bit synchronous counter using Delay flip flop(D-FF)
(6 marks)
00
2.b.
Design 4:1 MUX using 2:1 MUX
(6 marks)
00
3.a.
Explain Mealy and Moore circuits with diagram?
(6 marks)
00
3.b.
Draw and explain operation of Tri-state TTL inverter?
(6 marks)
00
OR
4.a.
Explain the terms related to ASM chart.
(6 marks)
00
a.State box
b.Decision box
c.Conditional box
4.b.
Draw and explain the working of 2 input CMOS inverter.
(6 marks)
00
5.a.
Implement the following functions using PLA
(6 marks)
00
$F1 = \Sigma m(0,2,4,6)$
$F2 = \Sigma m(2,3,6,7)$
5.b.
Explain the characteristics of DRAM.
(4 marks)
00
5.c.
State various types of ROMS and their applications.
(3 marks)
00
OR
6.a.
Draw the internal organization of asynchronous SRAM.
(6 marks)
00
6.b.
Explain the general architecture of CPLD.
(4 marks)
00
6.c.
Explain the differnece between PLA and PAL.
(3 marks)
00
7.a.
Draw and explain the block diagram of microcontroller.
(6 marks)
00
7.b.
Explain stack operation and stack pointer register of 8051.
(4 marks)
00
7.c.
What are the different modes of timer of 8051?
(3 marks)
00
OR
8.a.
Explain 8051 port structure with neat diagram.
(6 marks)
00
8.b.
Explain the use of DPTR.
(4 marks)
00
8.c.
State salient features of 8051 microcntroller.
(5 marks)
00
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