and 2 others joined a min ago.
0
296views
Analog and Digital Electronics Question Paper - Jun 17 - Computer Science (Semester 3) - Visveswaraya Technological University (VTU)
1 Answer
0
0views
written 6.9 years ago by
teamques10
★ 70k
|
Analog and Digital Electronics - Jun 17
Computer Science (Semester 3)
Total marks: 80
Total time: 3 Hours
INSTRUCTIONS
(1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Draw neat diagrams wherever necessary.
1.a.
Explain with help of a circuit diagram and characteristic curves working of N-Channel DE MOSFET.
(12 marks)
00
1.b.
List and explain any one application pf FET and its working with circuit diagram.
(4 marks)
00
OR
2.a.
Explain the performance parameters of operational amplifier.
(8 marks)
00
2.b.
Mention and explain the working of any two applications of operational amplifier.
(8 marks)
00
3.a.
What is a logical gate ? Realize $((A+B) \cdot C) D$ using only NAND Gates.
(4 marks)
00
3.b.
Describe positive and negative logic. List the equivalences between them.
(4 marks)
00
3.c.
Find the minimal SOP (sum of product) for the following Boolean functions using K-map
(8 marks)
00
i) $f(a, b, c, d)=\sum m(6,7,9,10,(3)+d(1,4,5,11)$
ii) $f(a, b, c, d)=\pi M(1,2,3,4,10)+d(0,15)$
OR
4.a.
Using Quine-MCClusky Method simplify the following Boolean equation.
(10 marks)
00
$f(a, \overline{b}, c, d)=\sum m(0,1,2,3,10,11,12,13,14,15)$
4.b.
Define Hazard.Explain Different Types of Hazards.
(6 marks)
00
5.a.
What is multiplexer ? Design a 32 to 1 multiplexer (MUX) using two 16 to 1 MUX and one 2 to 1 MUX.
(4 marks)
00
5.b.
Show How using 3 to 8 Decoder and multi input OR gates, following Boolean Expression can be realized simultaneously.
(5 marks)
00
$\mathrm{F}_{1}(\mathrm{a}, \mathrm{b}, \mathrm{c})=\Sigma \mathrm{m}(0.4,6), \mathrm{F}_{2}(\mathrm{a}, \mathrm{b}, \mathrm{c})=\sum \mathrm{m}(0,5), \mathrm{F}_{3}(\mathrm{a}, \mathrm{b}, \mathrm{c})=\sum \mathrm{m}(1,2,3,7)$
5.c.
Design 7 segment Decoder using PLA.
(7 marks)
00
OR
6.a.
Implement The Boolean function expressed by SOP $f(a, b, c, d)=\sum m(1,2,5,6,9,12)$ using 8 : 1 MUX.
(4 marks)
00
6.b.
What is magnitude comparator ? Design and explain 2 bit magnitude comparator.
(8 marks)
00
6.c.
Differentiate between combinational and sequential circuit.
(4 marks)
00
7.a.
With a neat logic diagrams and truth table .Explain the working of JK master slave Flip-Flop along with its implementaion using NAND Gates.
(10 marks)
00
7.b.
Derive the characteristic equation for SR, D and JK Flip-Flop.
(6 marks)
00
OR
8.a.
Using Negative Edge triggered D-Flip Flop.Draw a logic diagram of 4 bit serial in serial out (SISO) Register . Draw the waveform to shift Binary number 1010 into this register.
(6 marks)
00
8.b.
Explain with neat diagram how shift register can be applied for serial addition.
(7 marks)
00
8.c.
Differentiate between synchronous and Asynchronous counter.
(12 marks)
00
9.a.
Design Asynchronous counter for the sequence 0$\rightarrow 4 \rightarrow 1 \rightarrow 2 \rightarrow 6 \rightarrow 0 \rightarrow 4$ . Using SR Flip Flop.
(12 marks)
00
9.b.
With neat diagram .Explain Digital Clock.
(4 marks)
00
OR
10.a.
Explain 2 bit simultaneous A/D converter.
(10 marks)
00
10.b.
What is Binary ladder ? Explain the Binary Ladder with Digital input of 1000.
(6 marks)
00
ADD COMMENT
EDIT
Please log in to add an answer.