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Analog and Digital Electronics Question Paper - Dec 18 - Computer Science (Semester 3) - Visveswaraya Technological University (VTU)
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Analog and Digital Electronics - Dec 18
Computer Science (Semester 3)
Total marks: 80
Total time: 3 Hours
INSTRUCTIONS
(1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Draw neat diagrams wherever necessary.
1.a.
Explain the working of N-channel MOSFET , with the help of neat diagram.
(8 marks)
00
1.b.
What is application of FET?
(4 marks)
00
1.c.
What are the ideal characteristics of op-amp?
(4 marks)
00
OR
2.a.
Explain the performance parameters of op-amp.
(8 marks)
00
2.b.
Explain the relaxation oscillator, with the help of neat diagram.
(8 marks)
00
3.a.
Minimum the following Boolean function using K-map method ,
(6 marks)
00
$\mathrm{F}(\mathrm{A}, \mathrm{B}, \mathrm{C}, \mathrm{D})=\sum \mathrm{m}(0,2,3,8,10,11,12,14)$
3.b.
Apply Quine Mc-Cluskey method to find the essential prime implicants for the Boolean expression,
(10 marks)
00
$\mathrm{F}(\mathrm{A}, \mathrm{B}, \mathrm{C}, \mathrm{D})=\sum \mathrm{m}(0,1,2,3,10,11,12,13,14,15)$
OR
4.a.
Minimize the following Boolean function using k-map method.
(6 marks)
00
$\mathrm{F}(\mathrm{A}, \mathrm{B}, \mathrm{C}, \mathrm{D})=\operatorname{MM}(0,1,2,3,4)+\sum \mathrm{d}(5,7)$
4.b.
What is Hazard ? Explain its types with examples.
(10 marks)
00
5.a.
Implement the following function using 8:1 multiplexer
(5 marks)
00
$\mathrm{F}(\mathrm{A}, \mathrm{B}, \mathrm{C}, \mathrm{D})=\sum \mathrm{m}(1,2,5,7,8,10,11,13,14,15)$
5.b.
Realize the following using 3:8 decoder
(5 marks)
00
i) $\mathrm{F}(\mathrm{A}, \mathrm{B}, \mathrm{C})=\sum \mathrm{m}(1,3,4)$
ii) $\mathrm{F}(\mathrm{A}, \mathrm{B}, \mathrm{C})=\sum \mathrm{m}(3,5,7)$
5.c.
Design a priority encoder using the truth table. The order of three inputs is $\mathrm{x}_{1}\gt\mathrm{X}_{2} \times \mathrm{X}_{3}$
(5 marks)
00
OR
6.a.
Design seven segment decoder using PLA.
(8 marks)
00
6.b.
Design Half adder and Full adder.
(8 marks)
00
7.a.
Explain Smith contact bounce circuit.
(8 marks)
00
7.b.
Give state transition diagram and characteristic equations for SR-FF and JK-FF.
(8 marks)
00
OR
8.a.
With a neat diagram ,explain Ring and Johnson counter.
(8 marks)
00
8.b.
What is shift register ? With neat diagram ,explain 4-bit parallel in serial out shift registers.
(8 marks)
00
9.a.
Define counter .Design mod-8 up synchronous counter using JK-FF.
(12 marks)
00
9.b.
Write VHDL code for mod-8 uo counter.
(4 marks)
00
OR
10.a.
Explain the binary ladder with digital of 1000.
(6 marks)
00
10.b.
Explain with neat diagram , single slope A/D converters.
(10 marks)
00
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