1.a. Explain the different biasing circuits of BJT. for each circuit f‌ind an expression for stability factor. Also describe how to find the Q point of the circuit.

1.b. Draw the circuit of voltage divider bias. Take the circuit parameter as, $\mathrm{V}_{\mathrm{CC}}=10 V, \mathrm{R}_{2}=17 \mathrm{K\Omega}, \mathrm{R}_{1}=83 \mathrm{K\Omega}, \mathrm{R}_{\mathrm{C}}=2 \mathrm{K} \Omega, R_{E}=0.5 \mathrm{K} \Omega$, find Q point and terminal voltages. The transistor has $\beta=100$ and $V_{B E}=0.7 \mathrm{V}$

2.a. Explain the operation of transistor as a switch with the help of neat circuit diagram and waveforms. Also enumerate the design procedure.

2.b. For the following circuit, find the Q point, Take $\mathrm{V}_{\mathrm{CC}}=10 \mathrm{V}, \mathrm{R}_{\mathrm{C}}=1 \mathrm{K} \Omega, \mathrm{R}_{\mathrm{E}}=0.5 \mathrm{K\Omega}, \beta=50, \mathrm{V}_{\mathrm{BE}}=0.7 \mathrm{V}$

3.a. Draw the circuit of emitter follower with voltage divider biasing and derive expressions for current gain, voltage gain input and output impedances.

3.b. For the following circuit find current gain, voltage gain, input and output impedances.

4.a. With neat diagrams derive expressions for Miller capacitances $\left(\mathrm{C}_{\mathrm{M}} \text { and } \mathrm{C}_{\mathrm{MO}}\right)$

4.b. For the following circuit f‌ind the lower cut-off frequency,

5.a. Two amplif‌iers are cascaded. The load resistance $R_{L}=20 \mathrm{K} \Omega$ and internal resistance of the voltage source is $2K \Omega$. Find the

i. Loaded voltage gain of each stage.

ii. Total voltage gain of cascaded amplifier with $R_{S}$ .

iii. Current gain of cascaded amplifier.

iv. Output impedance.

The f‌irst stage bias No load voltage gain = 1, Input impedance = $500 K\Omega$, Output impedance = 1 K, The second stage has a no load voltage gain of 300, input impedance of $1K\Omega$ and output impedance of $50 K\Omega$

5.b. With neat diagram explain cascade amplifier.

6.a. Derive suitable expression to explain the effect of negative feedback on,

i. Gain stability

ii. Distortion in amplifier

6.b. The open loop gain of an amplifier is subjected to variation of ±10% due to changes in temperature. Using such an amplifier design a feedback amplifier such that the closed loop gain of the amplifier is 150±1%. Find the value of open loop gain of the amplif‌ier and feedback factor.

7.a. Draw the circuit of class-A transformed amplif‌ier and explain its operation. Derive an expression for maximum eff‌iciency of conversion with the help of neat waveforms.

7.b. A transistor amplifier has zero signal collector current of 40 mA. When an a.c. source is connected, the dc collector current is 50 mA. The peak fundamental current in collector is 30 mA. Find second harmonic distortion and output ac power.

8.a. Draw the circuit of Wien bridge oscillator and explain its operation. Also derive an expression for frequency of oscillation.

8.b. Explain with neat circuit diagram. the operation of crystal oscillator and write the expression for frequency of oscillation.

9.a. With neat diagrams, explain the construction. working and static characteristics of n-channel JFET.

9.b. Draw the circuit of common source amplif‌ier with bypass capacitor and derive an expression for voltage gain and output impedance.

10.a. With the help of neat diagrams. explain the construction, working and characteristics of n-channel depletion MOSFET.

10.b. A common source amplif‌ier without bypass capacitor has $\mathrm{R}_{D}=2 \mathrm{K} \Omega, \quad \mathrm{R}_{5}=1 \quad \mathrm{K} \Omega \quad \mathrm{R}_{\mathrm{G}}=1 \mathrm{M} \Omega$, f‌ind voltage gain and output impedance $g_{m}=2 m Ʊ$