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Analog Electronic Circuits Question Paper - Jun 18 - Electrical And Electronics (Semester 3) - Visveswaraya Technological University (VTU)
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Analog Electronic Circuits - Jun 18
Electrical And Electronics (Semester 3)
Total marks: 80
Total time: 3 Hours
Note: Answer any FIVE full questions, choosing one full question from each module
Module-1
1.a.
Derive an expression for $E_{T h}, l_{B}$ and $V_{C E}$ for voltage divider bias circuit using exact analysis.
(8 marks)
00
1.b.
For the emitter bias network of Fig.Q1(b), determine the following parameters:
(8 marks)
00
i. $I_{B}$
ii. $I_{C}$
iii. $V_{CE}$
iv. $V_{C}$
v. $V_{E}$
vi. $V_{B}$
vii. $V_{BC}$
OR
2.a.
Derive the expression for stability factor for fixed bias circuit with respect to $\mathrm{I}_{\mathrm{CO}}, \mathrm{V}_{\mathrm{BE}}$ and $\beta$
(10 marks)
00
2.b.
With a neat circuit diagram explain the operation of self bias circuit
(6 marks)
00
Module-2
3.a.
With the help of $r_{e}$ equivalent model. derive an equation for input impedance. output impedance and voltage gain for an emitter follower configuration.
(8 marks)
00
3.b.
For the collector feedback configuration having $\mathrm{R}_{\mathrm{F}}=180 \mathrm{k} \Omega, \mathrm{R}_{\mathrm{C}}=2.7 \mathrm{k} \Omega, \mathrm{C}_{1}=10 \mu \mathrm{F},\mathrm{C}_{2}=10 \mu \mathrm{F}, \beta=200 , \mathrm{r}_{0}=\infty \Omega$ and $V_{CC} = 9 Volts$. determine the following parameters:
(8 marks)
00
i. $r_{e}$
ii. $Z_{i}$
iii. $Z_{o}$
iv. $A_{V}$
OR
4.a.
High frequency response BJT Amplifier has the following parameters:
(8 marks)
00
$\mathrm{Rs}=1 \mathrm{k} \Omega, \quad \mathrm{R}_{1}=40 \mathrm{k} \Omega, \mathrm{R}_{2}=10 \mathrm{k} \Omega, \quad \mathrm{R}_{\mathrm{E}}=2 \mathrm{k} \Omega, \mathrm{R}_{\mathrm{C}}=4 \mathrm{k} \Omega, \quad \mathrm{R}_{\mathrm{L}}=2.2 \mathrm{k} \Omega, \mathrm{C}_{\mathrm{S}}=10 \mathrm{\mu F}, \quad \mathrm{C}_{\mathrm{C}}=1 \mu \mathrm{F}, \quad \mathrm{C}_{\mathrm{E}}=20 \mu \mathrm{F}, \beta=100, \quad r_{c}=15.76 \Omega, \quad R_{1}=1.32 \mathrm{k} \Omega, A_{Vmid} (Amplifier)=-90, \quad r_{0}=\infty \Omega, \mathrm{V}_{\mathrm{CC}}=20 \mathrm{V}, \mathrm{C}_{\mathrm{bc}}=36 \mathrm{pF}, \quad \mathrm{C}_{\mathrm{bc}}=4 \mathrm{pF}, \mathrm{C}_{\mathrm{cc}}=1 \mathrm{pF}, \mathrm{C}_{\mathrm{wi}}=6 \mathrm{pF}, \mathrm{C}_{\mathrm{wo}}=8 \mathrm{pF}$
i. Determine $f_{Hi}$ and $f_{Ho}$
ii. Determine $f_{\beta}$ and $f_{T}$
4.b.
Derive equations for Miller input capacitance and Miller output capacitance
(8 marks)
00
Module-3
5.a.
Derive expressions for $Z_{i}$ and $A_{i}$ for a Darlington emitter follower circuit
(10 marks)
00
5.b.
Explain the need of a cascading amplifier? Draw and explain the block diagram of two stage cascade amplifier.
(6 marks)
00
OR
6.a.
List the general characteristics of negative feedback amplifiers.
(4 marks)
00
6.b.
Determine the voltage gain, input impedance and output impedance with feedback for voltage series feedback amplifier having $A=-100, \quad R_{i}=10 k \Omega, \quad R_{o}=20 k \Omega$ for feedback of
(6 marks)
00
i. $\beta=-0.1 \quad$
ii. $\beta=-0.5$
6.c.
For a current series feedback amplifier, derive an expression for output impedance with
feedback.
(6 marks)
00
Module-4
7.a.
With a neat circuit and waveforms, explain the operation of a transformer coupled class-A power amplifier.
(8 marks)
00
7.b.
Show that maximum efficiency of class-B push pull power amplifier circuit is 78.54%.
(8 marks)
00
OR
8.a.
With a neat circuit diagram and waveform explain the operation of RC phase shift oscillator using BJT. Write the expression for frequency of oscillation.
(8 marks)
00
8.b.
With a neat circuit diagram and waveform, explain the working principle of crystal oscillator operating in series resonant mode. A crystal has the following parameters: $L = 0.334 H, \quad C = 0.065 PF \quad and \quad R = 5.5 k\Omega$. Calculate the resonant frequency.
(8 marks)
00
Module-5
9.a.
Derive the expression for $\mathrm{A}_{\mathrm{v}}, \mathrm{Z}_{\mathrm{i}}$ and $\mathrm{Z}_{\mathrm{o}}$ for a JFET common source amplifier with fixed bias configuration.
(8 marks)
00
9.b.
For a self bias JFET circuit, $\mathrm{V}_{\mathrm{DD}}=+12 \mathrm{V} , \mathrm{R}_{\mathrm{D}}=2.2 \mathrm{k} \Omega, \mathrm{R}_{\mathrm{G}}=1 \mathrm{m\Omega},\mathrm{R}_{\mathrm{S}}=1 \mathrm{k} \Omega,\mathrm{I}_{\mathrm{DSS}}=8 \mathrm{mA}, \mathrm{V}_{\mathrm{P}}=-4$ volts. Determine the follwoing parameters:
(8 marks)
00
i. $V_{GS}$
ii. $I_{D}$
iii. $V_{DS}$
iv. $V_{S}$
v. $V_{G}$
vi. $V_{D}$
OR
10.a.
Derive expression for $\mathrm{V}_{\mathrm{GS}}, \mathrm{I}_{\mathrm{D}}, \mathrm{V}_{\mathrm{DS}}, \quad \mathrm{V}_{\mathrm{D}}$ and $\mathrm{V}_{\mathrm{S}}$ for a voltage divider bias circuit using FET.
(8 marks)
00
10.b.
With neat sketches, explain the basic operation and characteristics of n-channel depletion type MOSFET
(8 marks)
00
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