Design an NMOS current source to provide a bias current of $I_Q = 100 \mu A$ and an output resistance greater than $20 M \Omega$. The reference current is to be $I_{REF} = 150 \mu A$. The circuit is to be biased at $\pm 3.3V$ and the voltage at the drain of the current source transistor is to be no smaller than -2.2V. The minimum width to length ratio of the transistor is to be unity.

Given :-

$I_Q = I_O = 100 \mu A$

$R_O = 20 M\Omega$

$I_{REF} = 150 \mu A$

$V^+ = 3.3V$

$V^- = -3.3V$

$V_{DS2(sat)} = -2.2V$

$(\dfrac {W}{L})_1 =(\dfrac {W}{L})_2 = (\dfrac {W}{L})_3 = 1$

Assume $V_{TN} = 0.4V$

Now, $\dfrac {1}{R_O} = \lambda I_O$

Therefore,

$\lambda = \dfrac {1}{R_O I_O} = \dfrac {1}{(20 \times 10^6) (100 \times 10^{-6})} = 0.5 \times 10^{-3}$

Now,

$V_{DS2(sat)} = V_{GS2} - V_{TN2}$

Therefore,

$-2.2 = V_{GS2} - 0.4$

$V_{GS2} = -1.8V = V_{GS1}$

Now,

$I_{REF} = K_{n1}(V_{GS1} - V_{TN1})^2$

Therefore,

$150 \times 10^{-6} = K_{n1}(-1.8 - 0.4)^2$

$K_{n1} = 31 \mu A/ V^2$

Now,

$I_{O} = K_{n2}(V_{GS2} - V_{TN2})^2$

Therefore,

$100 \times 10^{-6} = K_{n2}(-1.8 - 0.4)^2$

$K_{n2} = 20.6 \mu A/ V^2$

Now,

$V_{GS3} = (V^+ - V^-) - V_{GS1} = (3.3 - (-3.3)) - (-1.8) = 8.4V$

Also,

$I_{REF} = K_{n3}(V_{GS3} - V_{TN})^2$

Therefore,

$150 \times 10^{-6} = K_{n3}(8.4 - 0.4)^2$

$K_{n3} = 2.3 \mu A/ V^2$