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IC Technology Question Paper - Dec 18 - Electronics Engineering (Semester 7) - Mumbai University (MU)
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IC Technology - Dec 18

Electronics Engineering (Semester 7)

Total marks: 80
Total time: 3 Hours
INSTRUCTIONS
(1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Draw neat diagrams wherever necessary.

Q1) Solve any four of the following

1(a) Enlist the steps for obtaining Silicon from Sand
(5 marks) 00

1(b) Compare evaporation and sputtering methods for metal deposition
(5 marks) 00

1(c)

(5 marks) 00

1(d) Enlist important Parameters for which measurement is required before device processing begin
(5 marks) 00

1(e) Explain SOI fabrication using bonded SOI and smart cut.
(5 marks) 00

2(a) Explain Liquid phase epitaxy method with neat diagram
(10 marks) 00

2(b) What do you mean by Class of clean room? Give the steps in standard RCA cycle during wafer cleaning
(10 marks) 2236 00

3(a) Explain the fabrication process steps along with vertical cross sectional view of CMOS inverter using N well along with vertical cross sectional view.
(10 marks) 00

3(b) Explain the difference Between Positive Photo resist and Negative Photo resist.
(5 marks) 00

3(c) Differentiate Between Schottky contacts and Ohmic contacts
(5 marks) 00

4(a) State need of $\lambda$ (lambda) based design rules and draw layout of CMOS based 2 input NAND gate.
(10 marks) 00

4(b) Describe with the help of a neat diagram Haynes - Shockley Experiment for measurement of drift mobility of n-type semiconductor
(10 marks) 00

5(a) Explain difference between SOI Finfet and Bulk Finfet
(5 marks) 00

5(b) Explain MMIC technology
(5 marks) 00

5(c) Explain the difference Between Contact, Proximity and Projection Printing
(10 marks) 00

Q6) Write short notes on (any four):

6(a) Types of Thin Film deposition Technique
(5 marks) 00

6(b) MESFET fabrication
(5 marks) 00

6(c) Application of nanowire
(5 marks) 00

6(d)
(5 marks) 00

6(e) Dry and Wet Etching
(5 marks) 00

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