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Write the VHDL code for 2-bit up-down counter with positive edge triggered clock.
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Explanation:

This is simple vhdl code for 2bit up down counter.

You could think what kind of pins may required to control up down counter?

  1. As it's name suggest up-down counter. It is either act as a up counter or as an down counter. So one pin is required to control it's operation. I named it mode. If mode is set then it'll act as a down counter, else it will act as down counter.
  2. I've provided reset pin to initialize counter value externally. Reset mechanism for up and down counter must be different as initial values for them are different.
  3. Enable : this pin is optional. I provide to hold counter value.
  4. Count: It is 2 bit output port.
  5. Clock: Most important pin for sequential circuit and as mention in question positive edge triggered counter, Clock is having major role.

Working principle;

    In this code highest priority is given to the mode of operation. Mode of operation can be selected by user mode'0' for up counter and mode'1' for down counter.

    mode 0: If reset pin is set then counter value is cleared to zero. If reset is zero and enable is also set then counter is incremented for each positive edge of clock. If counter is reach at it's max value(here it is 4or '11'in binary) then counter is automatically reset as per criteria for up counter.

    mode 1: Similar mechanism, Difference is reset value for counter is 4 or '11'in binary(highest value as it is in down counter mode).and another difference is counter decremented for each positive edge of clock. If counter is reach to it's min value which is zero.then counter will automatically reset as per down counter criteria.    

Flowchart:

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