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Draw the block diagram of internal architecture of XC9500 family CPLD and explain in brief.
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The internal PLD has 36 inputs and 18 macrocells and outputs.Hence it can be called as a “36V18”.The device in this family are named according to the number of macrocells it contains.For example,the smallest one has 2 FBs and macrocells whereas the largest one has 18 FBs and 288 macrocells.The external I/O pins can be used as input,output or bi-directional pin according to the device programming. The pin marked I/O,GCK,I/O/GSR and I/O/GTS are specsil purpose pins.Any of these pins can be used as global clock. Two or four pins can be used as a global three state control(GTS).The given figure shows only four FBs.

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