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Give TTL- CMOS interfacing
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Interfacing between CMOS and TTL:

Interfacing CMOS and TTL are as follows:

CMOS to TTL

  • If VCC is +5V, then one CMOS output can drive one LS TTL input
  • CMOS logic levels are close to 0 V or 5 V, so no threshold incompatibility
  • If CMOS is run at VCC ~3.3 V, thresholds are still compatible with TTL
  • Sometimes 4000 series or 74C chips are run at VCC > 5 V for improved speed
  • Need level-shifter chip to interface to TTL, for example 4049/50, 74C901/2

TTL to CMOS

  • TTL output thresholds are inconsistent with 74HC, 74C and 40' CMOS inputs
  • When CMOS is run with VCC = 5 V
  • Use a 74HCT buffer between them
  • Use an open collector buffer with pullup to 5 V
  • When CMOS uses VCC = 3.3 V (Usually 74HC only)
  • Direct connection from TTL to CMOS possible
  • When CMOS uses VCC > 5 V (Usually 4000 or 74C series< use level shifter buffer chip 40109, LTC1045, 14504 or use open collector buffer with pullup to 5 V.

Common Precautions

  • Noisy supply and ground lines can cause troubles that take hours to find.
  • Make VCC wire very large so that current surges don't cause much voltage drop.
  • Make a large bus wire, don't daisy chain VCC or ground lines.
  • Be very careful with grounding. Typical precautions are:
    • Ground all devices at one single point.
    • Use a ground plane.
    • One side of pc board a solid conductor for gnd connections.
  • Both VCC and ground lines should be wide traces or #14 or #16 wire to minimize both inductance and resistance.
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