A Master Slave flipflop consists of two flipflops. One flipflop acts as master and the other flipflop acts as slave.

JK Master Slave flipflop using NAND gates

The other flipflop which acts as slave will respond to the negative level of clock pulse.

Hence when the clock = 1 (positive level)

Master flipflop = active; Slave flipflop = inactive

when the clock = 0

Master flipflop = inactive; Slave flipflop = active

Truth table:

Operation:

Case-1 When J=K=0 (No change)

When Clock=0, the slave becomes active and master is inactive. But since S and R inputs have not changed, the outputs will also remain unchanged.

Case-2 When J=0; K=1 (Reset)

When Clock=1; Master is active; Slave is inactive. Therefore, output of the master becomes $Q_1=0$ and $\bar Q_1=1$. Therefore, S=0 and R=1.

When Clock=0; Master is inactive; Slave is active. Therefore, output of the master becomes $Q=0$ and $\bar Q=1$.

Again when Clock=1; Master is active; Slave is inactive. Therefore even with the changed outputs $Q=0$ and $\bar Q=1$ fedback to the master, its output will be $Q_1=0$ and $\bar Q_1=1$. Therefore, S=0 and R=1.

Case-3 When J=1 and K=1 (Set)

When Clock=1; Master is active; Slave is inactive. Therefore, outputs of the master become $Q_1=1$ and $\bar Q_1=1$. Therefore, S=1 and R=0.

When Clock=0; Master is inactive; Slave is active. Therefore, outputs of the master become $Q=1$ and $\bar Q=0$.

Again when Clock=1; Master is active; Slave is inactive. It can be shown that the outputs of the slave are stabilized to $Q=1$ and $\bar Q=0$.

Case-4 When J=K=1 (Toggle)

When Clock=1; outputs of the master will toggle. So S and R also will be inverted.

Clock=0; outputs of the slave will toggle. Therefore, these changed outputs are returned back to the master inputs. But, since Clock=0; the master is still inactive. So, it doesn't respond to these change outputs. This avoids multilple toggling which leads to race around condition.

The Master Slave flipflop will avoid the race around condition.