Asynchronous counter consists of a series connection of complementing flipflops, with the output of each filpflop connected to the clock input of the next higher order flipflop. The flipflop holding the least significant bit recieves the incoming clock pulses.

These counters are called asynchronous because not all flipflops are connected to the same clock.

Asynchronous counters are also termed as Ripple counters because the clock pulse which we give externally is fed into flipflop and is rippled or moved through the other counters after some propagation delay like a ripple on the water.

A ripple counter with n-flipflops has 2n states.

A major problem with ripple counters arises from the propagation delay of the flipflops constituting the couter.