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Design a 4 bit universal shift register and explain its working
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written 3.0 years ago by
teamques10
★ 65k
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If the register has both shifts and parallel load capabilities, it is referred as a universal shift register.
Function Table:
Mode control:
| S1 | S0 | Register Operation |
|---|---|---|
| 0 | 0 | No change |
| 0 | 1 | Shift right |
| 1 | 0 | Shift left |
| 1 | 1 | Parallel load |
* A clear control to clear the register …
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