written 8.6 years ago by | • modified 8.6 years ago |
Mumbai University > COMPS > Sem 3 > Digital Logic Design and Analysis
Marks: 8 M
Year: May 2015
written 8.6 years ago by | • modified 8.6 years ago |
Mumbai University > COMPS > Sem 3 > Digital Logic Design and Analysis
Marks: 8 M
Year: May 2015
written 8.6 years ago by |
Step 1 : Connect least signification variables as a select input of multiplexer.
$\hspace{1.2cm}$ Here, connect D to $S_0$ and C and $S_1$
Step 2: Derive input for multiplexer using implementation Table.
Fig(a): Implementation Table
$D_0$ $=\overline{AB}+\overline{A}B+AB \\ =\overline{AB}+B(\overline{A}+A) \hspace{2cm} as \ \overline{A}+A=1 \\ =\overline{AB}+B \\ =\overline{A}B$
$D_1$ $=\overline{AB}+A\overline{B} \\ =\overline{B}(\overline{A}+A) \hspace{3.1cm} as \ \overline{A}+A=1 \\ =\overline{B}$
$D_2$ $=\overline{AB}+\overline{A}B+AB \\ =\overline{AB}+B(\overline{A}+A) \\ =\overline{AB}+B \\ =\overline{A}B$
$D_3$ $=0$
Step 3: Multiplexer Implementation
$$\text{Fig (b) Multiplexer Implementation}$$