Mumbai University > COMPS > Sem 3 > Digital Logic Design and Analysis

Marks: 7 M

Year: Dec 14

Decade Counter:

• A decade counter is one of which goes through 10 unique combinations of output and then reset as the clock proceeds.
• We may use some sort of feedback in 4 bit binary counter to skip any six of the sixteen possible output state from 0000 to 1111 to get decade counter.
• A decade counter does not necessarily count from 0000 to 1001, it could count as 0000,0001,0010,1000,1010,1011,1110,0000,0001, and so on….
• Following fig shows the decade counter having a binary count it always equivalent to the input pulse count.
• The circuit is essentially, a ripple counter with which count upto 16.
• But we desire, a circuit operation in which count variable advance from 0 to 9 and their reset to 0 for a new cycle.

$$\text{Fig. Decade Counter}$$

The reset counter is accomplished at the desired count as follows:

1. With counter RESET count=0000 the counter is ready to stage counter cycle.

2. Input pulse advance counter in binary sequence upto count of a (count=1001)

3. The next count pulse advance the count to10 count=1010.

4. A logic NAND Gate decode the count of 10 providing a level of change at that time of trigger the one shot unit which then reset all counter stages.

5. Thus, the pulse after the counter is at count=9 effectively results in the counter going to count=0

6. The NAND gate provides output 1 until count reaches to 10.

7. When the count becomes 10, then the NAND gate output logical goes to 0,provding a 1 to 0 logic change to trigger the one shot unit, which provides a short pulse to all the counter stage.