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Discuss XC 9500 CPLD family architecture with neat block diagram. Describe main features.
written 9.4 years ago by gravatar for teamques10 teamques10 ★ 70k modified 3.8 years ago by gravatar for pedsangini276 pedsangini276 • 4.8k

Mumbai University > ELECTRO > Sem 3 > Digital Circuits and Designs

Marks: 10M

Year: Dec 2013 , May 2015
digital circuits and design
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written 9.4 years ago by gravatar for teamques10 teamques10 ★ 70k

  • The Xilinx XC 9500 is a family of Complex Progammable Logic Devices (CPLDs). The internal PLDs in Xilinx are called as function blocks (FBs).

  • Each internal PLD has 36 inputs and 18 macrocells and outputs. Hence it is called as a “36V18”.

  • The devices in this family are named according …

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