Solution:

$\longrightarrow$ Isp processors can be divided into two broad categories,

(1) General purpose DSP.

(2) Special-purpose DSP.

DSP processors include fixed point devices such as Texas Instruments TMS $320 \mathrm{C} 54 x$ and Motorola DSP $563 \times$ processors, and floating point Instruments TMS $320 C 4 \times$ and Analog Devices ADS $21 \times \times \times$ SHARC processors.

There are two types of special-purpose hardware.

(1) Hardware designed for efficient execution of specific DSP algorithms such as digital filters, and fast Fourier transform.

This type of special-purpose hardware is sometimes called an algorithm-specific digital signal processor.

(2) Hardware designed for specific applications for example telecommunications, digital audio, or control applications. This type of hardware is sometimes called an IP plication-specific digital signal processor.

In most cases, application-specific digital signal processors execute specific algorithms such as PCM encoding decoding but are also required to perform other application-specific operations.

When an instruction is processed in such a processor, units of the processor not involved at each instruction phase wait idly until control is passed on to them.

If it is to operate in real-time, a DSP processor must have its architecture optimized for executing OSP functions.

Basic Characteristics of DSP processor:

Multiple bus structures with separate memory space for data and program instructions.

The Ilo port provides a means of passing data to and from external devices such as the $A D C$ and $D A C$ or for passing digital data to other processors.

Increase in processor speed is achieved by making the individual units operate faster but there is a limit on how fast they can be made to operate.

Direct Memory Access (DMA) if available allows for the rapid transfer of blocks of data directly to or from data RAM typically under external control.

Arithmetic units for logical and arithmetic operations, which include an ALU, a hardware multiplier, and shifters.

Most DSP algorithms involve repetitive arithmetic operations such as multiplying, adding memory accesses, and heavy data flow through the CPU.

The following techniques are used:

Havard architecture.

L pipelining.

fast, dedicated hardware multiplier I accumulator.

special instructions dedicated to DSP.

On-chip memory/cache.

Extended parallelism - SIMD, VLIW, and static superscalar processing.