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Explain features of RISC and CISC processors.
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RISC (Reduced Instruction Set Computer)

RISC stands for Reduced Instruction Set Computer. RISC processor design has separate digital circuitry in the control unit, which produces all the necessary signals needed for the execution of each instruction in the instruction set of the processor.

Examples of RISC processors:

  • IBM RS6000, MC88100

  • DEC’s Alpha 21064, 21164 and 21264 processors

    Features of RISC Processors:

    The standard features of RISC processors are listed below:

    1. RISC processors use a small and limited number of instructions.

    RISC processors only support a small number of primitive and essential instructions. This puts emphasis on software and compiler design due to the relatively simple instruction set.

    2. RISC machines mostly uses hardwired control unit.

    Most of the RISC processors are based on the hardwired control unit design approach. In hardwired control unit, the control units use fixed logic circuits to interpret instructions and generate control signals from them. It is significantly faster than its counterpart but are rather inflexible.

    3. RISC processors consume less power and have high performance.

    RISC processors have been known to be heavily pipelined this ensures that the hardware resources of the processor are utilized to a maximum giving higher throughput and also consuming less power.

    4. Each instruction is very simple and consistent.

    Most instructions in a RISC instruction set are very simple that get executed in one clock cycle.

    5. RISC processors use simple addressing modes.

    RISC processors don’t have as many addressing modes and the addressing modes these processors have are rather very simple. Most of the addressing modes are for register operations and do not refer memory.

    6. RISC instruction is of uniform fixed length.

    The decision of RISC processor designers to provide simple addressing modes leads to uniform length instructions. For example, instruction length increases if an operand is in memory as opposed to in a register. a. This is because we have to specify the memory address as part of instruction encoding, which takes many more bits. This complicates instruction decoding and scheduling.

    7. Large Number of Registers.

    The RISC design philosophy generally incorporates a larger number of registers to prevent in large amounts of interactions with memory

    CISC (Complex Instruction Set Computer)

    CISC stands for Complex Instruction Set Computer. If the control unit contains a number of micro-electronic circuitry to generate a set of control signals and each micro-circuitry is activated by a micro-code, this design approach is called CISC design.

    The primary goal of CISC architecture is to complete a task in as few lines of assembly code as possible.

    Examples of CISC processors are:

    • Intel 386, 486, Pentium, Pentium Pro, Pentium II, Pentium III
  • Motorola’s 68000, 68020, 68040, etc.

Features of CISC Processors:

The standard features of CISC processors are listed below:

1. CISC chips have complex instructions.

A CISC processor would come prepared with a specific instruction (call it "MULT"). When executed, this instruction loads the two values into separate registers, multiplies the operands in the execution unit, and then stores the product in the appropriate register. Thus, the entire task of multiplying two numbers (2, 3) can be completed with one instruction: MULT 2, 3

MULT is what is known as a "complex instruction." It operates directly on the computer's memory banks and does not require the programmer to explicitly call any loading or storing functions. It closely resembles a command in a higher level language.

2. CISC processors have a variety of instructions:

There are a variety of instructions many of which are complex and thus make up for smaller assembly code thus leading to very low RAM consumption.

3. CISC machines generally make use of complex addressing modes.

CISC processes have a variety of different addressing modes in which the operands can be addressed from the memory as well as located in the different registers of the CPU.

There are many instructions that refer memory as opposed to RISC architecture

4. CISC processors have variable length instructions:

The decision of CISC processor designers to provide a variety of addressing modes leads to variable-length instructions. For example, instruction length increases if an operand is in memory as opposed to in a register.

5. Easier compiler design :

Compilers have very little to do when executing on a computer having CISC architecture. The complex instruction set and smaller assembly code meant little work for the compiler and thus eased up compiler design

6. CISC machines uses micro-program control unit:

CISC uses micro programmed control unit. These systems consist of micro programs which are nothing but series of microinstructions, which control the CPU at a very fundamental level of hardware circuitry. This is then stored in a control memory like ROM from where the CPU accesses them and generates control signals.

7. CISC processors are having limited number of registers.

CISC processors normally only have a single set of registers. Since the addressing modes give provisions for memory operands, limited number of “costly” register memory is sufficient for the functions.

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