An interfacing circuit is designed for an I/O device to facilitate data transfer. Input and output devices are used to enter data as well as to take out data from microprocessor to peripheral. This interfacing is referred to as the mapping of I/O either by using peripheral devices, i.e. I/O or by memory.
- When the processor, main memory and I/O share a common bus, two modes of addressing are possible:
I/O mapped I/O
Memory mapped I/O
Memory mapped I/O is an interfacing technique in which memory related instructions are used for data transfer and the device is identified by a 16-bit address. In this type, the I/O devices are treated as memory locations. The control signals used are MEMR and MEMW. The interfacing between I/O and microprocessor will be same as single memory location. For data transfer between I/O device and microprocessor, microprocessor will send address, generate control signals MEMR and MEMW.
In MEMR, it accepts data from I/O device while in MEMW it transfers data to I/O device.
Memory mapped I/O scheme is shown in Figure 1.In Figure 1, the left diagram is for the Read control signal and right diagram is for the Write control signal.
The address is of 16 bits A0 to A15. Control signals RD and WR are used to control the buffer latch. Combination of address lines A0-A15 can be done by using NAND gates and then it is combined with RD or WR signal. For buffer when A0 to A15 are at logic 1, the output of NAND gate will be low.
With memory-mapped I/O, there is a single address space for memory locations and I/O devices. The processor treats the status and data registers of I/O modules as memory locations and uses the same machine instructions to access both memory and I/O devices.
For example, with 10 address lines, a combined total of 210 1024 memory locations and I/O addresses can be supported, in any combination. With memory-mapped I/O, a single read line and a single write line are needed on the bus.
Advantage of memory-mapped I/O is that this large stock of instructions can be used, allowing more efficient programming.
A disadvantage is that valuable memory address space is used up.
In memory mapped I/O,
i. I/O and memory, both in combination are treated as memory.
ii. Device address is of 16-bits.
iii. MEMR and MEMW control signals are used and Arithmetic and logical operations are performed.
iv. Memory related instructions are available such as LDA, STA.
v. Data transfer takes place between any register and I/O.It consists of a total of 64K devices.
vi. Decoding 16-bits of address is required, therefore more hardware required.