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4.1k
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Write a short note on Optoelectronic devices.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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What are digital technologies?
ic technology updated 5.8 years ago by teamques10 ★ 70k
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How to enhance performance of BJT?
ic technology updated 5.8 years ago by teamques10 ★ 70k
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Write a short note on BiCMOS.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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Give the fabrication steps for MESFET.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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2.5k
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Explain MESFET technology.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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5.9k
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Explain PDSOI and FDSOI.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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1.8k
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Explain SIMOX .
ic technology updated 5.8 years ago by teamques10 ★ 70k
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3.4k
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Explain SOI fabrication using Bonded SOI and Smart cut method.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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2.8k
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1
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Write a short note on SOI technology.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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Explain VLSI testing process and test equipment.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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1
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3.6k
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Write a short note on VLSI trends affecting testing.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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Describe with the help of neat diagram Haynes - Shockley experiment for measurement of drift mobility of n-type semiconductor.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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Describe the experimental setup for the hot point probe method for conductivity measurement with the help of neat diagram.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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1.2k
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What is ATE?
ic technology updated 5.8 years ago by teamques10 ★ 70k
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1
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4.0k
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Write short note on parametric tests & Functionality tests for IC testing.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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1.5k
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1
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Explain electronics package reliability.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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2.2k
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Explain integrated circuit packages.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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1.3k
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Explain Minority carrier lifetime.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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3.5k
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Draw layout of 2 input NAND gate as per lambda based design rules.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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1.2k
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Draw the masks used in n-well process.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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1
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7.1k
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Draw layout of CMOS Inverter.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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1.0k
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1
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Give layers of CMOS processes.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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3.9k
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Explain fabrication process step along with vertical cross sectional views for CMOS inverter using twin tub process.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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1.1k
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Draw the layout view of CMOS inverter.
ic technology updated 5.8 years ago by teamques10 ★ 70k
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