Ask
Login
0
votes
1
answer
1.2k
views
1
answer
Zeolite An exhausted zeolite softener was regenerated by passing 150 lits of NaCl solution having strength of 150 g/lit . How many litres of hard having hardness as cac03 can be softened by this softe
engineering chemistry updated 4.3 years ago by malharkaj132 • 20
1
vote
1
answer
8.8k
views
1
answer
4-bit universal shift register.
digital logic design updated 4.3 years ago by abhi022mahajan • 0
3
votes
1
answer
51k
views
1
answer
Advantages and Disadvantages of using Multiplexer.
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
1.1k
views
1
answer
Universal Shift Register.
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
4.5k
views
1
answer
Implementation using 8 : 1 MUX
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
1.0k
views
1
answer
Explain Demorgan's law
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
4.1k
views
1
answer
State Diagram, State table, State assignment, Excitation table and maps
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
913
views
1
answer
Eliminate redundant states and draw reduced state diagram (10)
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
1.2k
views
1
answer
Standard SOP form
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
888
views
1
answer
Explain in detail truth table
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
1.3k
views
1
answer
BCD and Ex-3 codes
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
819
views
1
answer
Design a circuit with optimum utilization of PLA to implement the following function
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
872
views
1
answer
Convert SR flip flop to D flip flop.
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
1.5k
views
1
answer
Convert SR flip flop to D flip flop.
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
732
views
1
answer
JK f/f to SR F/F and O F/F
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
1.2k
views
1
answer
SR flip-flop to JK flip flop
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
790
views
1
answer
State Demorgans theorem and implement OR gate using NAND gate only.
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
760
views
1
answer
Working of T flip flop (5M)
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
1.2k
views
1
answer
Convert D type flip flop into T type flip flop
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
6.9k
views
1
answer
4-bit binary to gray code converter.
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
2.8k
views
1
answer
Explain working of encoder and decoder? (5 marks)
digital logic design updated 4.3 years ago by phenjoisilab • 0
1
vote
1
answer
3.8k
views
1
answer
odd parity os Original number = 1010
digital logic design updated 4.3 years ago by phenjoisilab • 0
0
votes
1
answer
6.9k
views
1
answer
Compare striplines and microstrip lines
rf modeling and antennas updated 4.3 years ago by teamques10 ★ 70k
1
vote
1
answer
13k
views
1
answer
What is meant by Interprocess communication? Explain shared memory and message passing.
operating systems updated 4.3 years ago by phenjoisilab • 0
2
votes
1
answer
4.4k
views
1
answer
What do you mean by elastic behaviour of cloud
cloud computing updated 4.3 years ago by teamques10 ★ 70k
<prev • 28,287 results • page 389 of 1132 • next >