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4.2k
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State and prove De Morgan's theorem
digital electronics updated 4.9 years ago by teamques10 ★ 70k
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1
answer
704
views
1
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Compare FPGAs with CPLDs
microprocessors and applications updated 4.9 years ago by teamques10 ★ 70k
0
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1
answer
761
views
1
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Compare SRAM with DRAM
computer organization and architecture updated 4.9 years ago by teamques10 ★ 70k
0
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1
answer
636
views
1
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Compare TTL with CMOS logic families
analog electronics updated 4.9 years ago by teamques10 ★ 70k
0
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1
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549
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1
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Compare combinational circuit with sequential circuit
digital system design updated 4.9 years ago by teamques10 ★ 70k
0
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1
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844
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1
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Convert (11810) in to (i) BCD (ii) Hexadecimal (iii) Octal
digital electronics updated 4.9 years ago by teamques10 ★ 70k
0
votes
1
answer
550
views
1
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Implement X-OR gate using NAND
digital electronics updated 4.9 years ago by teamques10 ★ 70k
0
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1
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684
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1
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Explain Architecture and features of FPGA
microprocessors and applications updated 4.9 years ago by teamques10 ★ 70k
0
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1
answer
658
views
1
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Construction and operation of schottkey diode
engineering physics updated 4.9 years ago by teamques10 ★ 70k
0
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1
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800
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1
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Explain Mealey machine and Moore machine
theory of computation updated 4.9 years ago by teamques10 ★ 70k
0
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1
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1.0k
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1
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Explain 3:8 decoder
digital system design updated 4.9 years ago by teamques10 ★ 70k
0
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1
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616
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1
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Explain bidirectional 4 bit universal shift register
digital electronics updated 4.9 years ago by teamques10 ★ 70k
0
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1
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667
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1
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Explain bidirectional 4 bit universal shift register
digital electronics updated 4.9 years ago by teamques10 ★ 70k
0
votes
1
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622
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1
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Compare EPROM and FLASH memories
microprocessors and applications updated 4.9 years ago by teamques10 ★ 70k
0
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1
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671
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1
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Design following Boolean equation using 4:1 mux F(A,B,C,D)=Σ m(2,4,5,7,9,11,12)
digital electronics updated 4.9 years ago by teamques10 ★ 70k
1
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1
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1.4k
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1
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Design synchronous counter using J.K flip-flop for the given sequence- 0-2-3-5-7-0
digital electronics updated 4.9 years ago by teamques10 ★ 70k
0
votes
1
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570
views
1
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Minimum the following using Quine Mc Clusky method F(A,B,C,D)=Σm(3,4,9,13,14,15) + Σd(5,6)
digital electronics updated 4.9 years ago by teamques10 ★ 70k
0
votes
1
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622
views
1
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Perform following operation using 2's compliment method- (i) (28)10-(42)10 (ii) (52)10-(-18)10
digital electronics updated 4.9 years ago by teamques10 ★ 70k
0
votes
1
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1.1k
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1
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Explain Master-Slave J.K Flip-Flop
digital electronics updated 4.9 years ago by teamques10 ★ 70k
0
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1
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601
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1
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Compare Asynchronous and synchronous counter
digital electronics updated 4.9 years ago by teamques10 ★ 70k
0
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1
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1.3k
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1
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For ECL and CMOS logic families define- (i) noise margin (ii) fan-in (iii) fan-out
analog electronics updated 4.9 years ago by teamques10 ★ 70k
0
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1
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4.8k
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1
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Explain Johnson counter or twisted ring counter.
digital electronics updated 4.9 years ago by teamques10 ★ 70k
0
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1
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822
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1
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Explain any one shift register in detail.
digital electronics updated 4.9 years ago by teamques10 ★ 70k
1
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1
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8.0k
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1
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Design ripple counter using JK flip flop for the state:
digital electronics updated 4.9 years ago by teamques10 ★ 70k
5
votes
1
answer
25k
views
1
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Define the following in terms of Logical families i) Propagation delay ii) Fanout iii) Power Dissipation iv) Figure of Merit v) Noise margin
digital electronics updated 4.9 years ago by teamques10 ★ 70k
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