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devilkarth

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7 years, 8 months ago
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7 years, 12 months ago

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  • 36
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Ectc
Mumbai University (MU)

Top contributions by devilkarth

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Compare NMOS & CMOS Technology in VLSI Design
vlsi design updated 3.8 years ago by phenjoisilab • 0
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2.8k
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For equal rise time & fall delay time assume $\mu_n=2 \mu_p$ .Draw an inverter equivalent circuit of 3 Input NAND gate & 2 input XOR
vlsi design updated 3.7 years ago by phenjoisilab • 0
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(Duplicate) Write short note on clock generation, stabilization, and distribution
vlsi design updated 3.7 years ago by teamques10 ★ 70k
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Compare Ripple carry adder and carry lookahead adder
vlsi design updated 3.7 years ago by teamques10 ★ 70k
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Explain effect on drain current due to channel length modulation & velocity saturation
vlsi design updated 3.7 years ago by phenjoisilab • 0
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Compare Constant voltage & constant field scaling with their merits & demerits
vlsi design updated 3.7 years ago by phenjoisilab • 0
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What are the drawbacks of dynamic CMOS logic show the modification in dynamic CMOS logic to overcome its drawback
vlsi design updated 3.7 years ago by phenjoisilab • 0
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1.4k
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What are the remedies to avoid CMOS latch up?
digital vlsi design updated 3.7 years ago by phenjoisilab • 0
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1.4k
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Draw $4 \ast 4 $pseudo nmos ROM array circuitry having stored following data 1111,1011,1101,0111 .Also list number of address pins ,data pins & word pins
electrical machines updated 3.7 years ago by phenjoisilab • 0
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(Duplicate) Give & explain CMOS input output protection circuits
vlsi design updated 3.7 years ago by phenjoisilab • 0
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14
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C: Compare NMOS & CMOS Technology in VLSI Design
updated 3.8 years ago by phenjoisilab • 0

Latest awards to devilkarth


created 50 posts within first three months of joining

created a question with more than 1,000 views