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334
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Arithmetic and logical unit.
digital logic design updated 13 hours ago by sagarkolekar ♣ 3.1k
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1
answer
239
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1
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Draw truth table of full sub tractor and realize it using 3:8 decoder.
digital logic design updated 13 hours ago by sagarkolekar ♣ 3.1k
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1
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286
views
1
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Design and implement one digit BCD tables.
digital logic design updated 13 hours ago by sagarkolekar ♣ 3.1k
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1
answer
285
views
1
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Explain ASCII Code
digital logic design updated 13 hours ago by sagarkolekar ♣ 3.1k
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1
answer
238
views
1
answer
Explain De Morgan's laws
digital logic design updated 13 hours ago by sagarkolekar ♣ 3.1k
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1
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214
views
1
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Simplify using $\theta$ using Mc.clusky method.
digital logic design updated 13 hours ago by sagarkolekar ♣ 3.1k
0
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1
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3.2k
views
1
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Draw three levels of DE-D. for a Supermarket App
structured and object oriented analysis design updated 13 hours ago by sagarkolekar ♣ 3.1k
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1
answer
343
views
1
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What is peer to peer communication?
computer networks updated 14 hours ago by binitamayekar ♣ 2.1k
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1
answer
16
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1
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Zeolite An exhausted zeolite softener was regenerated by passing 150 lits of NaCl solution having strength of 150 g/lit . How many litres of hard having hardness as cac03 can be softened by this softe
engineering chemistry updated 14 hours ago by yashchavan363 ♦ 20
1
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1
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697
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1
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4-bit universal shift register.
digital logic design updated 16 hours ago by prakhar1144 ♣ 2.3k
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1
answer
32
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1
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COD of water
engineering chemistry updated 16 hours ago by Krishna_Agrawal ♣ 2.1k
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1
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19k
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1
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Advantages and Disadvantages of using Multiplexer.
digital logic design updated 17 hours ago by sagarkolekar ♣ 3.1k
1
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1
answer
272
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1
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Universal Shift Register.
digital logic design updated 17 hours ago by sagarkolekar ♣ 3.1k
1
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1
answer
728
views
1
answer
Implementation using 8 : 1 MUX
digital logic design updated 17 hours ago by sagarkolekar ♣ 3.1k
1
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1
answer
264
views
1
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Explain Demorgan's law
digital logic design updated 17 hours ago by sagarkolekar ♣ 3.1k
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1
answer
887
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1
answer
State Diagram, State table, State assignment, Excitation table and maps
digital logic design updated 17 hours ago by sagarkolekar ♣ 3.1k
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1
answer
311
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1
answer
Eliminate redundant states and draw reduced state diagram (10)
digital logic design updated 17 hours ago by sagarkolekar ♣ 3.1k
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1
answer
343
views
1
answer
Standard SOP form
digital logic design updated 17 hours ago by sagarkolekar ♣ 3.1k
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1
answer
242
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1
answer
Explain in detail truth table
digital logic design updated 17 hours ago by sagarkolekar ♣ 3.1k
1
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1
answer
369
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1
answer
BCD and Ex-3 codes
digital logic design updated 17 hours ago by sagarkolekar ♣ 3.1k
1
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1
answer
169
views
1
answer
Design a circuit with optimum utilization of PLA to implement the following function
digital logic design updated 17 hours ago by sagarkolekar ♣ 3.1k
1
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1
answer
201
views
1
answer
Convert SR flip flop to D flip flop.
digital logic design updated 17 hours ago by sagarkolekar ♣ 3.1k
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1
answer
338
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1
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Convert SR flip flop to D flip flop.
digital logic design updated 18 hours ago by sagarkolekar ♣ 3.1k
1
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1
answer
239
views
1
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JK f/f to SR F/F and O F/F
digital logic design updated 18 hours ago by sagarkolekar ♣ 3.1k
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1
answer
429
views
1
answer
SR flip-flop to JK flip flop
digital logic design updated 18 hours ago by sagarkolekar ♣ 3.1k
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