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(Duplicate) What are the differences between hardwired and micro programmed control units
computer organization and architecture updated 3.9 years ago by phenjoisilab • 0
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Explain Cache Memory and describe Cache mapping technique.
computer organization and architecture updated 3.9 years ago by phenjoisilab • 0
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Explain various characteristics of memory
computer organization and architecture updated 3.9 years ago by yerasylmakulbe671 • 10
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Draw and explain basic instruction execution cycle.
computer organization and architecture updated 4.0 years ago by phenjoisilab • 0
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Write 8086 assembly language program to convert two digit packed BCD number to unpacked BCD number.
computer organization and architecture updated 4.0 years ago by phenjoisilab • 0
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What is Associative memory?
computer organization and architecture updated 4.0 years ago by phenjoisilab • 0
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Explain the hierarchical organization of computer memory.
computer organization and architecture updated 4.0 years ago by phenjoisilab • 0
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Explain any five arithmetic instructions of 8086 microprocessor with suitable examples.
computer organization and architecture updated 4.0 years ago by phenjoisilab • 0
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Explain single and double precision IEEE 754 binary floating point representation formats.
computer organization and architecture updated 4.0 years ago by phenjoisilab • 0
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Represent the number $( - 0.125)_{10}$ in single & double precision IEEE 754 binsry floaitng point representation formats.
computer organization and architecture updated 4.0 years ago by krithikkm200 • 10
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Short Note on Interleaved & Associative Mapping
computer organization and architecture updated 4.0 years ago by krithikkm200 • 10
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What is The Difference Between RISC and CISC Architecture?
computer organization and architecture updated 4.0 years ago by krithikkm200 • 10
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Consider main memory size is 3 pages. Following page address trace is generated by execution of a program.
computer organization and architecture updated 4.0 years ago by krithikkm200 • 10
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Consider main memory size as 3 pages. Following page address trace is generated by execution of A program.
computer organization and architecture updated 4.0 years ago by krithikkm200 • 10
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What is cache coherence problem and how it can be solved.
computer organization and architecture updated 4.0 years ago by krithikkm200 • 10
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Difference between SRAM & DRAM.
computer organization and architecture updated 4.0 years ago by krithikkm200 • 10
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Find page hit ratio by $ \text{(i) FIFO (ii) LRU (iii) LFU replacement policies}$.
computer organization and architecture updated 4.0 years ago by krithikkm200 • 10
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Write a short note on Memory Hierarchy.
computer organization and architecture updated 4.0 years ago by krithikkm200 • 10
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What are different I/O access methods? Explain in detail.
computer organization and architecture updated 4.0 years ago by krithikkm200 • 10
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Explain advantages of interrupt driven I\O over polling. Explain interrupt driven I/O access with one example.
computer organization and architecture updated 4.0 years ago by krithikkm200 • 10
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Short note on arithmetic instruction in IA-32 architecture.
computer organization and architecture updated 4.0 years ago by krithikkm200 • 10
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what is parallel processing?
computer organization and architecture updated 4.0 years ago by krithikkm200 • 10
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What is the effect of multiple data path in design processor.
computer organization and architecture updated 4.0 years ago by krithikkm200 • 10
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State the advancements in arithmetic and logical instructions supported by IA-32 architecture. Describe five floating point arithmetic instructions in IA-32.
computer organization and architecture updated 4.0 years ago by krithikkm200 • 10
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Find page hit ratio by $\text{ i) FIFO} \ \ \ \text{ii) LRU replacement scheme}. $
computer organization and architecture updated 4.0 years ago by pg1118329 • 0
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