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21
votes
1
answer
101k
views
1
answer
Explain Cache Memory and describe Cache mapping technique.
computer organization and architecture updated 2.2 years ago by sagarkolekar ★ 11k
4
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1
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5.5k
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1
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Write short notes: Principle of locality of references
computer organization and architecture updated 2.5 years ago by teamques10 ★ 64k
4
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1
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896
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1
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What is IO buffering?
operating systems computer organization and architecture updated 2.4 years ago by teamques10 ★ 64k
2
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1
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5.9k
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1
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Draw the Booth's algorithm and mutiply (-2 * -4) using Booth's algorithm
computer organization and architecture updated 2.4 years ago by binitamayekar ★ 6.4k
4
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1
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1.3k
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1
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Explain static RAM
computer organization and architecture updated 2.4 years ago by binitamayekar ★ 6.4k
36
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1
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138k
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1
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Short Note on Pipeline Hazard OR What are the types of pipeline hazards?
computer organization and architecture updated 2.2 years ago by sagarkolekar ★ 11k
5
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1
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10k
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1
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Consider a cache memory of 16 words. Each block consists of 4 words. Size of the main memory is 256 bytes. Draw associative mapping and calculate TAG, and WORD size.
computer organization and architecture updated 2.3 years ago by teamques10 ★ 64k
3
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1
answer
44k
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1
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Draw the flowchart of non restoring division algorithm and Explain the same.
computer organization and architecture updated 2.3 years ago by teamques10 ★ 64k
8
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1
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27k
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1
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Explain Instruction Format with different types.
computer organization and architecture updated 2.4 years ago by teamques10 ★ 64k
5
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1
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4.0k
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1
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A program having 10 instructions (without Branch and Call instructions) is executed on non-pipeline and pipeline processors.
computer organization and architecture updated 2.4 years ago by teamques10 ★ 64k
7
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1
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25k
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1
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What is virtual memory? Explain how paging is useful in implementing virtual memory.
computer organization and architecture updated 2.3 years ago by sagarkolekar ★ 11k
7
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1
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19k
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1
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A block set associative cache consist of 64 blocks divided in 4 block sets. The main memory contains 4096 blocks, each 128 words of 16 bit length.
computer organization and architecture updated 2.4 years ago by teamques10 ★ 64k
3
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1
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3.1k
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1
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Write short note on Booths algorithm.
computer organization and architecture updated 2.5 years ago by teamques10 ★ 64k
5
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1
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2.0k
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1
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Calculate the hit and miss using various page replacement policies LRU, OPT, FIFO for following sequence (page frame size 3) 4,7,3,0,1,7,3,8,5,4,5,3,4,7,534 state which one is best for above example?
computer organization and architecture updated 2.4 years ago by teamques10 ★ 64k
15
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2
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149k
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2
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explain instruction cycle with interrupts execution with example
computer organization and architecture updated 2.2 years ago by sagarkolekar ★ 11k
1
vote
1
answer
944
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1
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Computer Design and architecture
computer organization and architecture updated 2.5 years ago by apsareena • 660
3
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1
answer
9.0k
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1
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What is Microprogram? Write microprogram for following operations.
computer organization and architecture updated 2.4 years ago by teamques10 ★ 64k
4
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1
answer
1.5k
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1
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Write Short Notes on : Performance measures
computer organization and architecture updated 2.5 years ago by teamques10 ★ 64k
2
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1
answer
4.7k
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1
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Draw the Booth's algorithm and mutiply (-2 * -4) using Booth's algorithm
computer organization and architecture updated 2.2 years ago by Sharad • 110
11
votes
1
answer
24k
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1
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Explain the page address translation in case of virtual memory and explain TLB
computer organization and architecture updated 5.1 years ago by teamques10 ★ 64k
10
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1
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75k
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1
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Explain six-stage instruction pipeline with suitable diagram
computer organization and architecture updated 4.1 years ago by prashantsaini • 0
1
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1
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1.1k
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1
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DRAM and refresh logic.
computer organization and architecture updated 2.9 years ago by teamques10 ★ 64k
0
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1
answer
629
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1
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Compare SRAM and DRAM
computer organization and architecture updated 2.9 years ago by teamques10 ★ 64k
1
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1
answer
74k
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1
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Explain Memory hierarchy. OR Explain in details Memory hierarchy with examples.
computer organization and architecture updated 4.1 years ago by prashantsaini • 0
0
votes
1
answer
838
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1
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Explain various techniques used for interprocess communication in an Embedded system.
computer organization and architecture updated 2.9 years ago by teamques10 ★ 64k
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