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Computer Organization And Architecture

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9
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1
answer
129k
views
1
answer
What is bus arbitration? Explain any two techniques of bus arbitration. OR Explain Bus Contention and different method to resolve it
computer organization and architecture updated 4.1 years ago by teamques10 ★ 64k
2
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1
answer
23k
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1
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Write short note on DMA.
computer organization and architecture updated 4.1 years ago by teamques10 ★ 64k
15
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2
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149k
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2
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explain instruction cycle with interrupts execution with example
computer organization and architecture updated 2.2 years ago by sagarkolekar ★ 11k
5
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1
answer
4.0k
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1
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A program having 10 instructions (without Branch and Call instructions) is executed on non-pipeline and pipeline processors.
computer organization and architecture updated 2.4 years ago by teamques10 ★ 64k
21
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1
answer
101k
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1
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Explain Cache Memory and describe Cache mapping technique.
computer organization and architecture updated 2.2 years ago by sagarkolekar ★ 11k
6
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1
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41k
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1
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Explain with diagram functioning of Micro programmed Control Unit.
computer organization and architecture updated 4.1 years ago by teamques10 ★ 64k
5
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1
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10k
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1
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Consider a cache memory of 16 words. Each block consists of 4 words. Size of the main memory is 256 bytes. Draw associative mapping and calculate TAG, and WORD size.
computer organization and architecture updated 2.3 years ago by teamques10 ★ 64k
4
votes
1
answer
122k
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1
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Multiply (-10) and (-4) using Booth's algorithm.
computer organization and architecture updated 2.3 years ago by teamques10 ★ 64k
2
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1
answer
2.5k
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1
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What is the difference between the interrupt and polling?
computer organization and architecture updated 2.3 years ago by binitamayekar ★ 6.4k
4
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1
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19k
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1
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What are major requirements for an I/O module?
computer organization and architecture updated 4.1 years ago by teamques10 ★ 64k
8
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1
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27k
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1
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Explain Instruction Format with different types.
computer organization and architecture updated 2.4 years ago by teamques10 ★ 64k
3
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1
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9.0k
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1
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Explain the intel Pentium processor pipelining and superscalar architecture Or Explain the superscalar architecture
computer organization and architecture updated 4.1 years ago by meghalikalyankar • 2.2k
11
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1
answer
24k
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1
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Explain the page address translation in case of virtual memory and explain TLB
computer organization and architecture updated 5.1 years ago by teamques10 ★ 64k
4
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1
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48k
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1
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Explain features of RISC and CISC processors.
computer organization and architecture updated 4.1 years ago by teamques10 ★ 64k
1
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1
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8.7k
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1
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Multiply $(-2)_{10}$ and (-5)_{10}$ using Booths algorithm.
computer organization and architecture updated 4.1 years ago by teamques10 ★ 64k
36
votes
1
answer
138k
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1
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Short Note on Pipeline Hazard OR What are the types of pipeline hazards?
computer organization and architecture updated 2.2 years ago by sagarkolekar ★ 11k
10
votes
1
answer
75k
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1
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Explain six-stage instruction pipeline with suitable diagram
computer organization and architecture updated 4.1 years ago by prashantsaini • 0
10
votes
1
answer
118k
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1
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Explain role of different registers like IR, PC, SP, AC, MAR and MDR used in $V_{nn}$ Neumann model.
computer organization and architecture updated 4.1 years ago by teamques10 ★ 64k
3
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1
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45k
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1
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Explain Microinstruction sequencing and execution.
computer organization and architecture updated 2.2 years ago by sagarkolekar ★ 11k
2
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1
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6.2k
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1
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What is The Difference Between RISC and CISC Architecture?
computer organization and architecture updated 2.2 years ago by pedsangini276 • 4.7k
3
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1
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2.8k
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1
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Show IEEE 754 Standards for Binary Floating Point Representation for 32 bit single format and 64 bit double format.
computer organization and architecture updated 4.1 years ago by teamques10 ★ 64k
2
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1
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17k
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1
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Using Booth's Algorithm show the multiplication of 7X5.
computer organization and architecture updated 4.1 years ago by teamques10 ★ 64k
6
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1
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51k
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1
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Draw flowchart of Booths algorithm.
computer organization and architecture updated 4.1 years ago by teamques10 ★ 64k
4
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1
answer
37k
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1
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Write 8086 assembly language program to count number of 0's and 1's in a given 8 bit number.
computer organization and architecture updated 16 months ago by sagarkolekar ★ 11k
1
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1
answer
1.1k
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1
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DRAM and refresh logic.
computer organization and architecture updated 2.9 years ago by teamques10 ★ 64k
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