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Digital Logic Design

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7
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1
answer
339k
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1
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3 to 8 Decoder and truth table of 3 to 8 decoder.
digital logic design updated 3.9 years ago by pg1118329 • 0
15
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1
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219k
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1
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Design a mod 5 synchronous up counter using J-K flip flop
digital logic design updated 4.0 years ago by teamques10 ★ 70k
5
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1
answer
178k
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1
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Design mod-10 synchronous counter using JK Flip Flops.Check for the lock out condition.If so,how the lock-out condition can be avoided? Draw the neat state diagram and circuit diagram with Flip Flops.
digital logic design updated 4.0 years ago by teamques10 ★ 70k
10
votes
1
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151k
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1
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Implement following Expression using 4:1 mux $F(A,B,C,D)=\sum m(0,1,2,4,6,9,12,14)$
digital logic design updated 9.6 years ago by teamques10 ★ 70k
5
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1
answer
149k
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1
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Implement a full adder circuit using two 4:1 multiplexers.
digital logic design updated 7.3 years ago by teamques10 ★ 70k
12
votes
1
answer
117k
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1
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Design 4-bit binary to gray code conversion OR Design and implement 4 bit binary to gray code converter
digital logic design updated 4.2 years ago by teamques10 ★ 70k
2
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1
answer
94k
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1
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Explain in brief weighted and non-weighted codes with one example each.
digital logic design updated 9.0 years ago by teamques10 ★ 70k
4
votes
1
answer
90k
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1
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Implement the following expression using 8:1 mux $F(A,B,C,D)=\sum m(0,1,3,5,7,10,11,13,14,15)$
digital logic design updated 9.6 years ago by teamques10 ★ 70k
7
votes
1
answer
69k
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1
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What is shift register? Explain 4-bit Bi-directional shift register?
digital logic design updated 9.6 years ago by teamques10 ★ 70k
5
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1
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67k
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1
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Explain with Example 4-bit BCD adder using IC- 7483.
digital logic design updated 9.6 years ago by teamques10 ★ 70k
0
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1
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65k
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1
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Convert JK Flip flop to SR and D Flip Flop
digital logic design updated 9.6 years ago by teamques10 ★ 70k
2
votes
1
answer
60k
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1
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Implement single digit BCD adder using 4-bit binary adder IC7483. Show the design procedure & explain its operation.
digital logic design updated 9.0 years ago by teamques10 ★ 70k
4
votes
1
answer
54k
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1
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What is multiplexer tree? Construct 32:1 multiplexer using 8:1 multiplexer only. Explain how the logic on particular data line is steered to the output in this design with example.
digital logic design updated 9.1 years ago by sukadevsahu2 • 0
0
votes
1
answer
53k
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1
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Find out relations between Alpha, Beta and Gama as current amplification factors for CE, CB, CC Configurations.
digital logic design updated 7.3 years ago by teamques10 ★ 70k
4
votes
1
answer
53k
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1
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Prove that NAND gate is universal gate
digital logic design updated 5.2 years ago by teamques10 ★ 70k
5
votes
1
answer
51k
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1
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Explain the race around condition in JK flip-flop. State various methods to overcome it.
digital logic design updated 9.0 years ago by teamques10 ★ 70k
3
votes
1
answer
51k
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1
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Advantages and Disadvantages of using Multiplexer.
digital logic design updated 4.0 years ago by phenjoisilab • 0
0
votes
1
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50k
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1
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Short Note on Gray Code and Excess-3 Code.
digital logic design updated 3.2 years ago by phenjoisilab • 0
1
vote
1
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45k
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1
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Implementation of function using mux
digital logic design updated 3.9 years ago by pg1118329 • 0
3
votes
1
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43k
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1
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Draw a circuit diagram for 3-bit asynchronous binary down counter using master-slave JK flip-flops.
digital logic design updated 3.9 years ago by phenjoisilab • 0
0
votes
1
answer
42k
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1
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Design mod -3 up counter using J-k flip flop
digital logic design updated 5.2 years ago by akshaysainianil • 0
2
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1
answer
41k
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1
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Draw and explain the working of 4-bit ring counter with timing diagram
digital logic design updated 9.0 years ago by teamques10 ★ 70k
1
vote
1
answer
36k
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1
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Explain ZENER Breakdown Mechanism in zener diode with VI Characteristics
digital logic design updated 6.3 years ago by teamques10 ★ 70k
0
votes
1
answer
36k
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1
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Design full adder using 3:8 decoder with active low outputs and NAND gates.
digital logic design updated 9.6 years ago by teamques10 ★ 70k
0
votes
1
answer
35k
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1
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Explain the Operation of 4-bit universal shift register.
digital logic design updated 9.6 years ago by teamques10 ★ 70k
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