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Digital Logic Design

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6
votes
1
answer
270k
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1
answer
3 to 8 Decoder and truth table of 3 to 8 decoder.
digital logic design updated 2.2 years ago by binitamayekar ★ 6.4k
14
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1
answer
194k
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1
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Design a mod 5 synchronous up counter using J-K flip flop
digital logic design updated 2.3 years ago by teamques10 ★ 64k
5
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1
answer
151k
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1
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Design mod-10 synchronous counter using JK Flip Flops.Check for the lock out condition.If so,how the lock-out condition can be avoided? Draw the neat state diagram and circuit diagram with Flip Flops.
digital logic design updated 2.3 years ago by teamques10 ★ 64k
10
votes
1
answer
127k
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1
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Implement following Expression using 4:1 mux $F(A,B,C,D)=\sum m(0,1,2,4,6,9,12,14)$
digital logic design updated 7.8 years ago by teamques10 ★ 64k
5
votes
1
answer
119k
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1
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Implement a full adder circuit using two 4:1 multiplexers.
digital logic design updated 5.6 years ago by teamques10 ★ 64k
10
votes
1
answer
92k
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1
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Design 4-bit binary to gray code conversion OR Design and implement 4 bit binary to gray code converter
digital logic design updated 2.5 years ago by teamques10 ★ 64k
2
votes
1
answer
88k
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1
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Explain in brief weighted and non-weighted codes with one example each.
digital logic design updated 7.3 years ago by teamques10 ★ 64k
4
votes
1
answer
72k
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1
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Implement the following expression using 8:1 mux $F(A,B,C,D)=\sum m(0,1,3,5,7,10,11,13,14,15)$
digital logic design updated 7.8 years ago by teamques10 ★ 64k
7
votes
1
answer
64k
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1
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What is shift register? Explain 4-bit Bi-directional shift register?
digital logic design updated 7.8 years ago by teamques10 ★ 64k
5
votes
1
answer
54k
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1
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Explain with Example 4-bit BCD adder using IC- 7483.
digital logic design updated 7.8 years ago by teamques10 ★ 64k
0
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1
answer
53k
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1
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Convert JK Flip flop to SR and D Flip Flop
digital logic design updated 7.8 years ago by teamques10 ★ 64k
2
votes
1
answer
53k
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1
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Implement single digit BCD adder using 4-bit binary adder IC7483. Show the design procedure & explain its operation.
digital logic design updated 7.3 years ago by teamques10 ★ 64k
3
votes
1
answer
50k
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1
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What is multiplexer tree? Construct 32:1 multiplexer using 8:1 multiplexer only. Explain how the logic on particular data line is steered to the output in this design with example.
digital logic design updated 7.4 years ago by krrish • 350
5
votes
1
answer
50k
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1
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Explain the race around condition in JK flip-flop. State various methods to overcome it.
digital logic design updated 7.3 years ago by teamques10 ★ 64k
0
votes
1
answer
49k
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1
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Find out relations between Alpha, Beta and Gama as current amplification factors for CE, CB, CC Configurations.
digital logic design updated 5.6 years ago by teamques10 ★ 64k
0
votes
1
answer
45k
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1
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Short Note on Gray Code and Excess-3 Code.
digital logic design updated 17 months ago by sagarkolekar ★ 11k
4
votes
1
answer
43k
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1
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Prove that NAND gate is universal gate
digital logic design updated 3.4 years ago by teamques10 ★ 64k
3
votes
1
answer
43k
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1
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Advantages and Disadvantages of using Multiplexer.
digital logic design updated 2.3 years ago by sagarkolekar ★ 11k
3
votes
1
answer
38k
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1
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Draw a circuit diagram for 3-bit asynchronous binary down counter using master-slave JK flip-flops.
digital logic design updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
1
answer
34k
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1
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Design mod -3 up counter using J-k flip flop
digital logic design updated 3.4 years ago by ninadsail • 10
2
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1
answer
33k
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1
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Draw and explain the working of 4-bit ring counter with timing diagram
digital logic design updated 7.3 years ago by teamques10 ★ 64k
0
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1
answer
33k
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1
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Design full adder using 3:8 decoder with active low outputs and NAND gates.
digital logic design updated 7.8 years ago by teamques10 ★ 64k
1
vote
1
answer
32k
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1
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Explain ZENER Breakdown Mechanism in zener diode with VI Characteristics
digital logic design updated 4.6 years ago by teamques10 ★ 64k
0
votes
1
answer
31k
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1
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Explain the Operation of 4-bit universal shift register.
digital logic design updated 7.8 years ago by teamques10 ★ 64k
1
vote
1
answer
28k
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1
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Compare the performance of TTL ,CMOS and ECL Logic.
digital logic design updated 7.8 years ago by teamques10 ★ 64k
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