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Digital System Design

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3
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1
answer
41k
views
1
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Design a VHDL Code for 4 bit full adder.
digital system design updated 3.8 years ago by pedsangini276 • 4.8k
20
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1
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221k
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1
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State and prove Demorgan's theorem
digital system design updated 6.1 years ago by abhishektiwari1 • 100
0
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1
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1.2k
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1
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Design a full adder using 3:8 decoder
digital system design updated 6.1 years ago by abhishektiwari1 • 100
1
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1
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8.7k
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1
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Explain Mealy machine and Moore machine
digital system design updated 6.1 years ago by abhishektiwari1 • 100
1
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1
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2.1k
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1
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Minimize the following expression using Quine McClusky Technique
digital system design updated 6.1 years ago by abhishektiwari1 • 100
0
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1
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1.7k
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1
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TTL and CMOS logic families.
digital system design updated 3.5 years ago by pedsangini276 • 4.8k
2
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1
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4.8k
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1
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Express F in SOP and POS form
digital system design updated 6.1 years ago by abhishektiwari1 • 100
0
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1
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20k
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1
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Compare TTL and CMOS logic families
digital system design updated 6.1 years ago by abhishektiwari1 • 100
0
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1
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1.3k
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1
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Using Boolean Algebra, prove the following
digital system design updated 6.1 years ago by abhishektiwari1 • 100
0
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1
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26k
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1
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Design a 2 bit comparator and implement using logic gates
digital system design updated 6.1 years ago by abhishektiwari1 • 100
0
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1
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1.4k
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1
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Minimize the expression using Quine Mc-cluskey technique
digital system design updated 6.1 years ago by abhishektiwari1 • 100
1
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1
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7.2k
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1
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Implement the Boolean function using 8:1 multiplexer
digital system design updated 6.1 years ago by abhishektiwari1 • 100
7
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1
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68k
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1
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Prove that NAND and NOR gates are Universal gates
digital system design updated 6.1 years ago by abhishektiwari1 • 100
0
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1
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2.1k
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1
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What is shift register? Explain any one type of shift register. Give its application.
digital system design updated 4.5 years ago by teamques10 ★ 70k
1
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1
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14k
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1
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Write VHDL code for 3 bit up counter
digital system design updated 6.1 years ago by abhishektiwari1 • 100
2
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1
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21k
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1
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VHDL Code for Full Subtractor
digital system design updated 6.1 years ago by abhishektiwari1 • 100
2
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1
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33k
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1
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Explain Full Adder circuit using PLA having three inputs, 8 product terms and two outputs.
digital system design updated 6.1 years ago by abhishektiwari1 • 100
2
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1
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7.9k
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1
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Explain CPLD and FPGA
digital system design updated 6.1 years ago by abhishektiwari1 • 100
0
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1
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2.1k
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1
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Explain SRAM and DRAM
digital system design updated 6.1 years ago by abhishektiwari1 • 100
0
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1
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1.2k
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1
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Compare SRAM with DRAM
digital system design updated 6.1 years ago by abhishektiwari1 • 100
0
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1
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3.1k
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1
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Convert $(532.125)_8$ into decimal, binary and hexadecimal
digital system design updated 6.1 years ago by abhishektiwari1 • 100
5
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1
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100k
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1
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Design 3 bit Binary to Gray code converter
digital system design updated 6.1 years ago by abhishektiwari1 • 100
0
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1
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5.0k
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1
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Perform the following operation using 2's compliment
digital system design updated 6.1 years ago by abhishektiwari1 • 100
0
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1
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1.9k
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1
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Explain the following decimals in gray code form
digital system design updated 6.1 years ago by abhishektiwari1 • 100
0
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1
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660
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1
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What is shift refister? Explain any one type of shift register. Give its application.
digital system design updated 4.5 years ago by teamques10 ★ 70k
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