TAGGED IN

Vlsi Design

Follow this tag to get notifications whenever a new post is added

153
Posts
0
Followers
0
Contributors

ALL TAGS

Read
Write

vote

answers

1.1k

views

answers

Define Scaling .Explain various types of scaling

vlsi design updated 3.9 years ago by phenjoisilab • 0

votes

answers

947

views

answers

Explain significance of sacling in VLSI circuits

vlsi design updated 3.9 years ago by phenjoisilab • 0

votes

answers

1.8k

views

answers

Compare Constant voltage & constant field scaling with their merits & demerits

vlsi design updated 3.9 years ago by phenjoisilab • 0

votes

answers

2.9k

views

answers

For equal rise time & fall delay time assume $\mu_n=2 \mu_p$ .Draw an inverter equivalent circuit of 3 Input NAND gate & 2 input XOR

vlsi design updated 3.9 years ago by phenjoisilab • 0

votes

answers

1.0k

views

answers

Consider CMOS circuit with following parameters $v_{DD}=3.3v,v_{TOn}=0.6v,v_{TO},p=-0.7v,\mu_nC_{ox}=60 \mu A/v^2, \mu_pC_{ox}=20 \mu A/v^2, (W/L)n=8,(W/L)p=12$Calculate noise margins of the circuit

vlsi design updated 3.9 years ago by phenjoisilab • 0

votes

answers

1.7k

views

answers

What are the drawbacks of dynamic CMOS logic show the modification in dynamic CMOS logic to overcome its drawback

vlsi design updated 3.9 years ago by phenjoisilab • 0

votes

answers

1.9k

views

answers

Explain effect on drain current due to channel length modulation & velocity saturation

vlsi design updated 3.9 years ago by phenjoisilab • 0

votes

answers

730

views

answers

explain concept of Charge Sharing & Charge Lekage

vlsi design updated 3.9 years ago by phenjoisilab • 0

votes

answers

792

views

answers

Implement following function using CMOS F=AB+AC+AB

vlsi design updated 3.9 years ago by phenjoisilab • 0

votes

answers

809

views

answers

Draw JK FF using CMOS & explain its working

vlsi design updated 3.9 years ago by phenjoisilab • 0

votes

answers

731

views

answers

Draw CMOS implementation of D FF

vlsi design updated 3.9 years ago by phenjoisilab • 0

votes

answers

935

views

answers

Give read & write stability criterion for 6 T RAM if the pullup transistors are replaced by resistors

vlsi design updated 3.9 years ago by phenjoisilab • 0

votes

answers

801

views

answers

design decoder circuit for ROM array

vlsi design updated 3.9 years ago by phenjoisilab • 0

votes

answers

888

views

answers

Draw CLA carry chain using dynamic CMOS logic

vlsi design updated 3.9 years ago by phenjoisilab • 0

votes

answers

700

views

answers

Design $4 \ast 4$ barrel shifter

vlsi design updated 3.9 years ago by teamques10 ★ 70k

votes

answers

1.2k

views

answers

Draw CLA adder using i) static CMOS ii) Dynamic CMOS logic iii) Pseudo NMOS logic

vlsi design updated 3.9 years ago by teamques10 ★ 70k

votes

answers

1.1k

views

answers

Implement $4 \ast 4$ barrel shifter using transmission gate >Explain various operation using the same

vlsi design updated 3.9 years ago by phenjoisilab • 0

votes

answers

1.9k

views

answers

Compare Ripple carry adder and carry lookahead adder

vlsi design updated 3.9 years ago by teamques10 ★ 70k

votes

answers

926

views

answers

Explain concept of carry look ahead adder with equation & how does it achieve better speed as compared to ripple carry adder

vlsi design updated 3.9 years ago by phenjoisilab • 0

votes

answers

1.0k

views

answers

Explain drawback of RCA .Explain 4 bit CLA adder with its carry equation logical network using Dynamic CMOS logic

vlsi design updated 3.9 years ago by phenjoisilab • 0

votes

answers

959

views

answers

Explain how ESD affect MOS. Give and explain input protection circuits

vlsi design updated 3.9 years ago by teamques10 ★ 70k

votes

answers

756

views

answers

Explain interconnect scaling with its length, width, thickness, and capacitance

vlsi design updated 3.9 years ago by teamques10 ★ 70k

votes

answers

1.3k

views

answers

Explain low power design considerations

vlsi design updated 3.9 years ago by teamques10 ★ 70k

votes

answers

1.2k

views

answers

Explain resistance and capacitance estimation

vlsi design updated 3.9 years ago by teamques10 ★ 70k