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1
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1
answer
17k
views
1
answer
Implement 10 bit comparator using IC 7485.
digital circuits and design updated 4.4 years ago by teamques10 ★ 70k
0
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1
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24k
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1
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Draw the circuit diagram of JK FF using NAND gates. Derive its characteristic equation and excitation table.
digital circuits and design updated 4.4 years ago by teamques10 ★ 70k
2
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1
answer
78k
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1
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Write short notes on: Master slave JK flip flop
digital circuits and design updated 4.3 years ago by krithikkm200 • 10
0
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1
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45k
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1
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Convert T flip flop to D flip flop
digital circuits and design updated 4.3 years ago by krithikkm200 • 10
1
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1
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11k
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1
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Write short notes: SR flip flop
digital circuits and design updated 4.3 years ago by krithikkm200 • 10
6
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1
answer
140k
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1
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Design MOD 10 asynchronous counter
digital circuits and design updated 4.6 years ago by teamques10 ★ 70k
0
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1
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12k
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1
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Explain glitch problem of ripple counter along with waveform.
digital circuits and design updated 4.3 years ago by krithikkm200 • 10
1
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1
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20k
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1
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Draw internal block diagram of IC 7490.
digital circuits and design updated 4.3 years ago by krithikkm200 • 10
3
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1
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57k
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1
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Design a MOD 11 synchronous counter using T flip flop.
digital circuits and design updated 4.3 years ago by krithikkm200 • 10
0
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1
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7.1k
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1
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Explain Mealy and Moore sequential machine
digital circuits and design updated 4.4 years ago by teamques10 ★ 70k
5
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2
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101k
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2
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Design Moore sequence detector to detect a sequence ----101-using DF/F
digital circuits and design updated 4.4 years ago by phenjoisilab • 0
7
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1
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106k
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1
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Design mealy sequence detector to detect a sequence ----1101---- using D filpflop and logic
digital circuits and design updated 4.4 years ago by teamques10 ★ 70k
0
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1
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4.6k
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1
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Eliminate redundant states and draw reduced state diagram
digital circuits and design updated 4.4 years ago by teamques10 ★ 70k
0
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1
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2.3k
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1
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Identify indistinguishable state in following state table and obtain minimized state diagram
digital circuits and design updated 4.3 years ago by krithikkm200 • 10
0
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1
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2.5k
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1
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Identify indistinguishable state in following state table and obtain minimized state diagram
digital circuits and design updated 4.3 years ago by krithikkm200 • 10
0
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1
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2.3k
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1
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Identify indistinguishable state in following state table and obtain minimized state diagram
digital circuits and design updated 4.3 years ago by krithikkm200 • 10
0
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1
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2.1k
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1
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Analyze the sequential state machine shown in fig. Obtain the state diagram for the same
digital circuits and design updated 4.3 years ago by krithikkm200 • 10
0
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1
answer
2.3k
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1
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Analyze the sequential state machine shown in fig. Obtain the state diagram for the same
digital circuits and design updated 4.3 years ago by krithikkm200 • 10
0
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1
answer
2.1k
views
1
answer
Analyze the sequential state machine shown in fig. Obtain the state diagram for the same
digital circuits and design updated 4.3 years ago by krithikkm200 • 10
0
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1
answer
23k
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1
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Construct 4 bit ring counter using IC 74194 and draw output waveform
digital circuits and design updated 4.3 years ago by krithikkm200 • 10
0
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1
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11k
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1
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Explain input and output block architecture for FPGA 4000 family.
digital circuits and design updated 4.4 years ago by teamques10 ★ 70k
1
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1
answer
36k
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1
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Write short notes on: PAL AND PLA
digital circuits and design updated 4.3 years ago by krithikkm200 • 10
0
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1
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12k
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1
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Discuss XC 9500 CPLD family architecture with neat block diagram. Describe main features.
digital circuits and design updated 4.3 years ago by krithikkm200 • 10
0
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1
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1.9k
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1
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Design a circuit with optimum utilization of PLA to implement following functions
digital circuits and design updated 4.4 years ago by krithikkm200 • 10
0
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1
answer
3.1k
views
1
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Design a circuit with optimum utilization of PLA to implement following functions
digital circuits and design updated 4.2 years ago by phenjoisilab • 0
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