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6
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1
answer
137k
views
1
answer
Design MOD 10 asynchronous counter
digital circuits and design updated 4.0 years ago by teamques10 ★ 70k
5
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2
answers
100k
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2
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Design Moore sequence detector to detect a sequence ----101-using DF/F
digital circuits and design updated 3.8 years ago by sagarkolekar ★ 11k
1
vote
1
answer
1.9k
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1
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Simplify following logic functions and realize using NAND gates.
digital circuits and design updated 3.8 years ago by pedsangini276 • 4.8k
1
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1
answer
8.8k
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1
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**Implement following function using 8:1 MUX and logic gates.**
digital circuits and design updated 3.8 years ago by pedsangini276 • 4.8k
2
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1
answer
6.5k
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1
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Write short note on: JTAG and BIST
digital circuits and design updated 3.8 years ago by pedsangini276 • 4.8k
7
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1
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105k
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1
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Design mealy sequence detector to detect a sequence ----1101---- using D filpflop and logic
digital circuits and design updated 3.9 years ago by teamques10 ★ 70k
1
vote
1
answer
3.5k
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1
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**Draw truth table and logic diagram of Full subtractor.**
digital circuits and design updated 3.9 years ago by sagarkolekar ★ 11k
4
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1
answer
123k
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1
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Design MOD 6 asynchronous counter and explain glitch problem
digital circuits and design updated 3.8 years ago by pedsangini276 • 4.8k
6
votes
1
answer
32k
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1
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Explain Fan-in, Fan-out, Power Dissipation and Noise Immunity with reference to Digital ICs
digital circuits and design updated 3.8 years ago by pedsangini276 • 4.8k
7
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1
answer
96k
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1
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Implement following questions using NAND gate only:
digital circuits and design updated 3.8 years ago by pedsangini276 • 4.8k
9
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2
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129k
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2
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Design mealy sequence detector to detect a sequence ----1010---- using D filpflop and logic
digital circuits and design updated 4.1 years ago by teamques10 ★ 70k
2
votes
1
answer
3.7k
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1
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Draw truth table and logical diagram of half adder
digital circuits and design updated 3.8 years ago by pedsangini276 • 4.8k
1
vote
1
answer
10k
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1
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Short note on multiplexers.
digital circuits and design updated 3.8 years ago by pedsangini276 • 4.8k
0
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1
answer
4.5k
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1
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Eliminate redundant states and draw reduced state diagram
digital circuits and design updated 3.9 years ago by teamques10 ★ 70k
4
votes
1
answer
43k
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1
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Design 4-bit Johnson Counter using J=K flip-flop. Explain its operation using waveform.
digital circuits and design updated 3.8 years ago by teamques10 ★ 70k
-1
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1
answer
3.4k
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1
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Write a short note on fault model.
digital circuits and design updated 3.8 years ago by pedsangini276 • 4.8k
0
votes
1
answer
3.1k
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1
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Analyze the sequential-state-machine shown in figure. Obtain state diagram for the same.
digital circuits and design updated 3.8 years ago by pedsangini276 • 4.8k
0
votes
1
answer
40k
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1
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Draw a circuit diagram of a CMOS inverter. Draw its transfer characteristics and explain its operation
digital circuits and design updated 3.9 years ago by teamques10 ★ 70k
0
votes
1
answer
6.9k
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1
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Explain Mealy and Moore sequential machine
digital circuits and design updated 3.9 years ago by teamques10 ★ 70k
14
votes
1
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71k
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1
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Write Short notes on 2 input TTL NAND gate
digital circuits and design updated 3.9 years ago by teamques10 ★ 70k
1
vote
1
answer
18k
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1
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Use K-map to reduce following functions and then implement by NOR gates:
digital circuits and design updated 3.9 years ago by teamques10 ★ 70k
0
votes
1
answer
2.9k
views
1
answer
Design a circuit with optimum utilization of PLA to implement following functions
digital circuits and design updated 3.7 years ago by sagarkolekar ★ 11k
0
votes
1
answer
24k
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1
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Draw the circuit diagram of JK FF using NAND gates. Derive its characteristic equation and excitation table.
digital circuits and design updated 3.9 years ago by teamques10 ★ 70k
0
votes
1
answer
6.9k
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1
answer
Explain current sinking and sourcing when two standard TTL gates are connected
digital circuits and design updated 3.9 years ago by teamques10 ★ 70k
0
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1
answer
2.5k
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1
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Implement the following using NOR gates only:
digital circuits and design updated 3.9 years ago by teamques10 ★ 70k
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