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8
votes
1
answer
167k
views
1
answer
Implement following function using 8:1 MUX and logic gates
digital circuits and design updated 2.8 years ago by teamques10 ★ 67k
9
votes
2
answers
121k
views
2
answers
Design mealy sequence detector to detect a sequence ----1010---- using D filpflop and logic
digital circuits and design updated 3.0 years ago by teamques10 ★ 67k
6
votes
1
answer
119k
views
1
answer
Design MOD 10 asynchronous counter
digital circuits and design updated 2.9 years ago by teamques10 ★ 67k
4
votes
1
answer
107k
views
1
answer
Design MOD 6 asynchronous counter and explain glitch problem
digital circuits and design updated 2.7 years ago by pedsangini276 • 4.8k
7
votes
1
answer
97k
views
1
answer
Design mealy sequence detector to detect a sequence ----1101---- using D filpflop and logic
digital circuits and design updated 2.8 years ago by teamques10 ★ 67k
5
votes
2
answers
95k
views
2
answers
Design Moore sequence detector to detect a sequence ----101-using DF/F
digital circuits and design updated 2.7 years ago by sagarkolekar ★ 11k
5
votes
1
answer
86k
views
1
answer
Design and explain 8 bit binary adder using IC 7483.
digital circuits and design updated 2.8 years ago by teamques10 ★ 67k
6
votes
1
answer
85k
views
1
answer
Implement following questions using NAND gate only:
digital circuits and design updated 2.7 years ago by pedsangini276 • 4.8k
2
votes
1
answer
75k
views
1
answer
Write short notes on: Master slave JK flip flop
digital circuits and design updated 2.7 years ago by pedsangini276 • 4.8k
8
votes
1
answer
69k
views
1
answer
Design MOD-12 asynchronous counter using T-flipflop.
digital circuits and design updated 2.7 years ago by teamques10 ★ 67k
14
votes
1
answer
64k
views
1
answer
Write Short notes on 2 input TTL NAND gate
digital circuits and design updated 2.8 years ago by teamques10 ★ 67k
2
votes
1
answer
64k
views
1
answer
Design a 1 digit BCD adder using IC 7483 and explain the operation for
digital circuits and design updated 2.8 years ago by teamques10 ★ 67k
1
vote
1
answer
63k
views
1
answer
Design MOD-8 asynchronous counter.
digital circuits and design updated 2.7 years ago by sagarkolekar ★ 11k
3
votes
1
answer
50k
views
1
answer
Design a MOD 11 synchronous counter using T flip flop.
digital circuits and design updated 2.7 years ago by pedsangini276 • 4.8k
0
votes
1
answer
38k
views
1
answer
Draw a circuit diagram of a CMOS inverter. Draw its transfer characteristics and explain its operation
digital circuits and design updated 2.8 years ago by teamques10 ★ 67k
4
votes
1
answer
37k
views
1
answer
Design 4-bit Johnson Counter using J=K flip-flop. Explain its operation using waveform.
digital circuits and design updated 2.7 years ago by teamques10 ★ 67k
1
vote
1
answer
34k
views
1
answer
Write short notes on: PAL AND PLA
digital circuits and design updated 2.7 years ago by pedsangini276 • 4.8k
0
votes
1
answer
33k
views
1
answer
Convert T flip flop to D flip flop
digital circuits and design updated 2.7 years ago by pedsangini276 • 4.8k
0
votes
1
answer
33k
views
1
answer
Write short note on: Stuck at '0' and stuck at '1' faults
digital circuits and design updated 2.7 years ago by pedsangini276 • 4.8k
2
votes
1
answer
32k
views
1
answer
Design a Mealy sequence detector to detect ...0101...using D-flip flop and logic gates
digital circuits and design updated 2.7 years ago by pedsangini276 • 4.8k
6
votes
1
answer
30k
views
1
answer
Explain Fan-in, Fan-out, Power Dissipation and Noise Immunity with reference to Digital ICs
digital circuits and design updated 2.7 years ago by pedsangini276 • 4.8k
1
vote
1
answer
21k
views
1
answer
Interfacing between CMOS and TTL
digital circuits and design updated 2.7 years ago by pedsangini276 • 4.8k
0
votes
1
answer
21k
views
1
answer
Draw the circuit diagram of JK FF using NAND gates. Derive its characteristic equation and excitation table.
digital circuits and design updated 2.8 years ago by teamques10 ★ 67k
0
votes
1
answer
21k
views
1
answer
Write a VHDL code for 8:1 Multiplexer with active low enable input
digital circuits and design updated 2.7 years ago by pedsangini276 • 4.8k
0
votes
1
answer
20k
views
1
answer
Design a circuit with optimum utilization of PLA to implement the following functions F1= $\sum m(0,2,5,8,9,11), F2=\sum m(1,3,8,10,13,15), F3=\sum m(0,1,5,7,9,12,14).$
digital circuits and design updated 2.7 years ago by pedsangini276 • 4.8k
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